From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shvedov Yury Date: Fri, 17 Oct 2014 15:59:26 +0400 Subject: [ath9k-devel] Support for Ubnt UniFi Outdoor Plus In-Reply-To: References: <541D3F79.7000203@brunswiek.org> <5440C543.7090008@arccn.ru> Message-ID: <5441049E.5020100@arccn.ru> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: ath9k-devel@lists.ath9k.org Hm... sounds good, but not very useful :) Do you know exactly or approximately what source I need to modify? On 10/17/2014 11:44 AM, Adrian Chadd wrote: > Hi, > > I'd just add some printf()'s in the openwrt board support .c source > file. But I'm not normally a Linux developer; I'm normally a FreeBSD > developer. :) > > > -a > (oops, I should say printk(). See? Not normally a Linux developer. :) > > > On 17 October 2014 00:29, Shvedov Yury wrote: >> Hi, >> >> I'm interested in this question too, but not familiar with GPIO subsystem. >> Can you tell me how to look at the atheros SoC GPIO register contents and >> the on-board CPU GPIO register contents please? >> Thank you. >> >> >> On 10/16/2014 09:03 PM, Adrian Chadd wrote: >>> Hi, >>> >>> It may be something as simple as GPIO pin settings. >>> >>> Would you mind taking a look at both the atheros SoC GPIO register >>> contents and the on-board CPU GPIO register contents? >>> >>> Thanks, >>> >>> >>> >>> >>> -a >>> >>> >>> On 20 September 2014 01:48, Birger Brunswiek wrote: >>>> Hi List, >>>> I want to use OpenWRT on my Ubnt UniFi Outdoor Plus. So far all works >>>> but the Wifi. The symptoms are poor reception and normal transmission >>>> levels. The problems do not appear using the stock firmware. They only >>>> appear after a power cycle when using OpenWRT. OpenWRT works as expected >>>> if no power cycle was performed after installation. It was suggested >>>> that this is due to the RF filter built into the unit >>>> >>>> (https://lists.openwrt.org/pipermail/openwrt-devel/2014-September/028103.html). >>>> Does anyone have some pointers so I can fix this? Perhaps somehow >>>> outputting the content of the registers before doing the power cycle? >>>> >>>> Cheers, >>>> Birger >>>> _______________________________________________ >>>> ath9k-devel mailing list >>>> ath9k-devel at lists.ath9k.org >>>> https://lists.ath9k.org/mailman/listinfo/ath9k-devel >>> _______________________________________________ >>> ath9k-devel mailing list >>> ath9k-devel at lists.ath9k.org >>> https://lists.ath9k.org/mailman/listinfo/ath9k-devel >> >> -- >> Kind regards >> Yury Shvedov >> -- Kind regards Yury Shvedov