From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45649) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XgCTi-0003mV-CZ for qemu-devel@nongnu.org; Mon, 20 Oct 2014 08:54:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XgCTb-0007IU-1G for qemu-devel@nongnu.org; Mon, 20 Oct 2014 08:54:26 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:5280) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XgCTa-0007I8-RQ for qemu-devel@nongnu.org; Mon, 20 Oct 2014 08:54:18 -0400 Message-ID: <544505F3.1010207@imgtec.com> Date: Mon, 20 Oct 2014 13:54:11 +0100 From: Leon Alrae MIME-Version: 1.0 References: <1404806257-28048-1-git-send-email-leon.alrae@imgtec.com> <1404806257-28048-2-git-send-email-leon.alrae@imgtec.com> <543D2C4F.8040308@imgtec.com> In-Reply-To: <543D2C4F.8040308@imgtec.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2 1/9] target-mips: add KScratch registers List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Yongbok Kim , qemu-devel@nongnu.org Cc: aurelien@aurel32.net Hi Yongbok, On 14/10/2014 14:59, Yongbok Kim wrote: >> @@ -4611,6 +4612,15 @@ static inline void gen_mtc0_store64 (TCGv arg, >> target_ulong off) >> tcg_gen_st_tl(arg, cpu_env, off); >> } >> +static inline void gen_mfc0_unimplemented(DisasContext *ctx, TCGv arg) >> +{ >> + if (ctx->insn_flags & ISA_MIPS32R6) { >> + tcg_gen_movi_tl(arg, 0); >> + } else { >> + tcg_gen_movi_tl(arg, ~0); >> + } >> +} >> + > > Not related with KScratch registers. It would be better to be a separate > patch or > as part of the patch [PATCH 5/6] target-mips: correctly handle access to > unimplemented CP0 register. Actually it is related to all cp0 registers and KScratch is the first cp0 register added in the series, thus in my opinion this is a good place for including the definition of gen_mfc0_unimplemented(). The patch you mentioned is correcting the remaining (existing before this patch) cp0 registers. Regards, Leon