From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?Q?Michel_D=c3=a4nzer?= Subject: Re: [PATCH 02/11 V2] radeon: evergreen: Fix probable mask then right shift defect Date: Tue, 28 Oct 2014 12:42:05 +0900 Message-ID: <544F108D.30906@daenzer.net> References: <88c64cce88264069e0e1637fc874e699e5b226f6.1414387334.git.joe@perches.com> <544E0D0E.6080206@daenzer.net> <1414419297.8884.5.camel@perches.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: Received: from mail.gna.ch (darkcity.gna.ch [195.226.6.51]) by gabe.freedesktop.org (Postfix) with ESMTP id A0CAE6E3AF for ; Mon, 27 Oct 2014 20:42:15 -0700 (PDT) In-Reply-To: <1414419297.8884.5.camel@perches.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Joe Perches Cc: Alex Deucher , =?UTF-8?Q?Christian_K=c3=b6nig?= , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org List-Id: dri-devel@lists.freedesktop.org T24gMjcuMTAuMjAxNCAyMzoxNCwgSm9lIFBlcmNoZXMgd3JvdGU6Cj4gUHJlY2VkZW5jZSBvZiAm IGFuZCA+PiBpcyBub3QgdGhlIHNhbWUgYW5kIGlzIG5vdCBsZWZ0IHRvIHJpZ2h0Lgo+IHNoaWZ0 IGhhcyBoaWdoZXIgcHJlY2VkZW5jZSBhbmQgc2hvdWxkIGJlIGRvbmUgYWZ0ZXIgdGhlIG1hc2su Cj4KPiBBZGQgcGFyZW50aGVzZXMgYXJvdW5kIHRoZSBtYXNrLgo+Cj4gVXNlIHRoZSBhbHJlYWR5 ICNkZWZpbmVkIHZhbHVlcyBpbnN0ZWFkIG9mIGhhcmRjb2RpbmcuCj4KPiBTaWduZWQtb2ZmLWJ5 OiBKb2UgUGVyY2hlcyA8am9lQHBlcmNoZXMuY29tPgo+IC0tLQo+PiBJIHRoaW5rIHRoaXMgc2hv dWxkIGJlIE5VTV9TSEFERVJfRU5HSU5FU19TSElGVD8KPgo+IChKb2UgY2FuJ3QgdHlwZSkKPgo+ IGV4YWN0bHkgcmlnaHQsIHRoYW5rcyBNaWNoZWwKPgo+ICAgZHJpdmVycy9ncHUvZHJtL3JhZGVv bi9ldmVyZ3JlZW4uYyB8IDMgKystCj4gICAxIGZpbGUgY2hhbmdlZCwgMiBpbnNlcnRpb25zKCsp LCAxIGRlbGV0aW9uKC0pCj4KPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL3JhZGVvbi9l dmVyZ3JlZW4uYyBiL2RyaXZlcnMvZ3B1L2RybS9yYWRlb24vZXZlcmdyZWVuLmMKPiBpbmRleCBh MzFmMWNhLi5hOTdhNjg1IDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9yYWRlb24vZXZl cmdyZWVuLmMKPiArKysgYi9kcml2ZXJzL2dwdS9kcm0vcmFkZW9uL2V2ZXJncmVlbi5jCj4gQEAg LTMzMDMsNyArMzMwMyw4IEBAIHN0YXRpYyB2b2lkIGV2ZXJncmVlbl9ncHVfaW5pdChzdHJ1Y3Qg cmFkZW9uX2RldmljZSAqcmRldikKPiAgIAlyZGV2LT5jb25maWcuZXZlcmdyZWVuLnRpbGVfY29u ZmlnIHw9Cj4gICAJCSgoZ2JfYWRkcl9jb25maWcgJiAweDMwMDAwMDAwKSA+PiAyOCkgPDwgMTI7 Cj4KPiAtCW51bV9zaGFkZXJfZW5naW5lcyA9IChnYl9hZGRyX2NvbmZpZyAmIE5VTV9TSEFERVJf RU5HSU5FUygzKSA+PiAxMikgKyAxOwo+ICsJbnVtX3NoYWRlcl9lbmdpbmVzID0gKChnYl9hZGRy X2NvbmZpZyAmIE5VTV9TSEFERVJfRU5HSU5FU19NQVNLKQo+ICsJCQkgICAgICA+PiBOVU1fU0hB REVSX0VOR0lORVNfU0hJRlQpICsgMTsKPgo+ICAgCWlmICgocmRldi0+ZmFtaWx5ID49IENISVBf Q0VEQVIpICYmIChyZGV2LT5mYW1pbHkgPD0gQ0hJUF9IRU1MT0NLKSkgewo+ICAgCQl1MzIgZWZ1 c2Vfc3RyYXBzXzQ7CgpSZXZpZXdlZC1ieTogTWljaGVsIETDpG56ZXIgPG1pY2hlbC5kYWVuemVy QGFtZC5jb20+CgoKLS0gCkVhcnRobGluZyBNaWNoZWwgRMOkbnplciAgICAgICAgICAgIHwgICAg ICAgICAgICAgICAgICBodHRwOi8vd3d3LmFtZC5jb20KTGlicmUgc29mdHdhcmUgZW50aHVzaWFz dCAgICAgICAgICB8ICAgICAgICAgICAgICAgIE1lc2EgYW5kIFggZGV2ZWxvcGVyCl9fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5n IGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwOi8vbGlzdHMuZnJlZWRl c2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759345AbaJ1H3A (ORCPT ); Tue, 28 Oct 2014 03:29:00 -0400 Received: from darkcity.gna.ch ([195.226.6.51]:54508 "EHLO mail.gna.ch" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753424AbaJ1DmO (ORCPT ); Mon, 27 Oct 2014 23:42:14 -0400 Message-ID: <544F108D.30906@daenzer.net> Date: Tue, 28 Oct 2014 12:42:05 +0900 From: =?UTF-8?Q?Michel_D=c3=a4nzer?= User-Agent: Mozilla/5.0 (X11; Linux ppc; rv:32.0) Gecko/20100101 Icedove/32.0 MIME-Version: 1.0 To: Joe Perches CC: Alex Deucher , =?UTF-8?Q?Christian_K=c3=b6nig?= , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 02/11 V2] radeon: evergreen: Fix probable mask then right shift defect References: <88c64cce88264069e0e1637fc874e699e5b226f6.1414387334.git.joe@perches.com> <544E0D0E.6080206@daenzer.net> <1414419297.8884.5.camel@perches.com> In-Reply-To: <1414419297.8884.5.camel@perches.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 27.10.2014 23:14, Joe Perches wrote: > Precedence of & and >> is not the same and is not left to right. > shift has higher precedence and should be done after the mask. > > Add parentheses around the mask. > > Use the already #defined values instead of hardcoding. > > Signed-off-by: Joe Perches > --- >> I think this should be NUM_SHADER_ENGINES_SHIFT? > > (Joe can't type) > > exactly right, thanks Michel > > drivers/gpu/drm/radeon/evergreen.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c > index a31f1ca..a97a685 100644 > --- a/drivers/gpu/drm/radeon/evergreen.c > +++ b/drivers/gpu/drm/radeon/evergreen.c > @@ -3303,7 +3303,8 @@ static void evergreen_gpu_init(struct radeon_device *rdev) > rdev->config.evergreen.tile_config |= > ((gb_addr_config & 0x30000000) >> 28) << 12; > > - num_shader_engines = (gb_addr_config & NUM_SHADER_ENGINES(3) >> 12) + 1; > + num_shader_engines = ((gb_addr_config & NUM_SHADER_ENGINES_MASK) > + >> NUM_SHADER_ENGINES_SHIFT) + 1; > > if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK)) { > u32 efuse_straps_4; Reviewed-by: Michel Dänzer -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer