From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 29 Oct 2014 18:24:08 +0100 (CET) Received: from mailapp01.imgtec.com ([195.59.15.196]:38254 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27012131AbaJ2RYHKbCKe (ORCPT ); Wed, 29 Oct 2014 18:24:07 +0100 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id 93BBAB671CA7E; Wed, 29 Oct 2014 17:23:57 +0000 (GMT) Received: from KLMAIL02.kl.imgtec.org (10.40.60.222) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.195.1; Wed, 29 Oct 2014 17:24:00 +0000 Received: from LEMAIL01.le.imgtec.org (192.168.152.62) by klmail02.kl.imgtec.org (10.40.60.222) with Microsoft SMTP Server (TLS) id 14.3.195.1; Wed, 29 Oct 2014 17:24:00 +0000 Received: from [192.168.154.94] (192.168.154.94) by LEMAIL01.le.imgtec.org (192.168.152.62) with Microsoft SMTP Server (TLS) id 14.3.195.1; Wed, 29 Oct 2014 17:23:59 +0000 Message-ID: <545122AF.303@imgtec.com> Date: Wed, 29 Oct 2014 17:23:59 +0000 From: Qais Yousef User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.8.0 MIME-Version: 1.0 To: Andrew Bresticker CC: Ralf Baechle , Rob Herring , Pawel Moll , Mark Rutland , "Ian Campbell" , Kumar Gala , Thomas Gleixner , Jason Cooper , Daniel Lezcano , John Crispin , David Daney , Linux-MIPS , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC References: <1414541562-10076-1-git-send-email-abrestic@chromium.org> <1414541562-10076-3-git-send-email-abrestic@chromium.org> <5450CAF9.3040902@imgtec.com> In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [192.168.154.94] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 43713 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: qais.yousef@imgtec.com Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips On 10/29/2014 05:08 PM, Andrew Bresticker wrote: > On Wed, Oct 29, 2014 at 4:09 AM, Qais Yousef wrote: >> On 10/29/2014 12:12 AM, Andrew Bresticker wrote: >>> +- reg : Base address and length of the GIC registers. >>> >> Also except for sead3, the base address should be properly reported by the >> hardware. The size is fixed (for a specific version of GIC at least - which >> is also reported by the hardware). So it would be nice to make this >> optional. > Even though this is usually probable, I'd prefer to leave this as > required, or at least "optional, but recommended". I don't have a > very strong opinion on it though, but perhaps the device-tree folks > do? The biggest advantage I can think of is that it can potentially make GIC DT definition more shareable across for instance multiple revisions of an SoC that might have the GIC at different base addresses. I won't insist too much though. From mboxrd@z Thu Jan 1 00:00:00 1970 From: Qais Yousef Subject: Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC Date: Wed, 29 Oct 2014 17:23:59 +0000 Message-ID: <545122AF.303@imgtec.com> References: <1414541562-10076-1-git-send-email-abrestic@chromium.org> <1414541562-10076-3-git-send-email-abrestic@chromium.org> <5450CAF9.3040902@imgtec.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Andrew Bresticker Cc: Ralf Baechle , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Thomas Gleixner , Jason Cooper , Daniel Lezcano , John Crispin , David Daney , Linux-MIPS , "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" List-Id: devicetree@vger.kernel.org On 10/29/2014 05:08 PM, Andrew Bresticker wrote: > On Wed, Oct 29, 2014 at 4:09 AM, Qais Yousef wrote: >> On 10/29/2014 12:12 AM, Andrew Bresticker wrote: >>> +- reg : Base address and length of the GIC registers. >>> >> Also except for sead3, the base address should be properly reported by the >> hardware. The size is fixed (for a specific version of GIC at least - which >> is also reported by the hardware). So it would be nice to make this >> optional. > Even though this is usually probable, I'd prefer to leave this as > required, or at least "optional, but recommended". I don't have a > very strong opinion on it though, but perhaps the device-tree folks > do? The biggest advantage I can think of is that it can potentially make GIC DT definition more shareable across for instance multiple revisions of an SoC that might have the GIC at different base addresses. I won't insist too much though. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html