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diff for duplicates of <54521181.8080005@nvidia.com>

diff --git a/a/1.txt b/N1/1.txt
index 15e9259..b1ff1a3 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,4 +1,4 @@
-On Thu, Oct 30, 2014 at 7:18 PM, Terje Bergström <tbergstrom@nvidia.com> 
+On Thu, Oct 30, 2014 at 7:18 PM, Terje Bergstr?m <tbergstrom@nvidia.com> 
 wrote:
  > On 30.10.2014 12:03, Alexandre Courbot wrote:
  >> I had to change the .reg of TEGRA_SWGROUP_GPU to 0xaac to get the IOMMU
diff --git a/a/content_digest b/N1/content_digest
index 8e93ae6..ee90907 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,21 +2,13 @@
  "ref\01413196434-5292-5-git-send-email-thierry.reding@gmail.com\0"
  "ref\054520CFE.9060907@nvidia.com\0"
  "ref\05452107D.8080207@nvidia.com\0"
- "ref\05452107D.8080207-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0"
- "From\0Alexandre Courbot <acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0"
- "Subject\0Re: [PATCH v4 05/12] memory: Add NVIDIA Tegra memory controller support\0"
+ "From\0acourbot@nvidia.com (Alexandre Courbot)\0"
+ "Subject\0[PATCH v4 05/12] memory: Add NVIDIA Tegra memory controller support\0"
  "Date\0Thu, 30 Oct 2014 19:22:57 +0900\0"
- "To\0Terje Bergstr\303\266m <tbergstrom-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>"
-  Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
- " linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0"
- "Cc\0Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>"
-  Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
-  Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
-  iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org
- " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
- "On Thu, Oct 30, 2014 at 7:18 PM, Terje Bergstr\303\266m <tbergstrom@nvidia.com> \n"
+ "On Thu, Oct 30, 2014 at 7:18 PM, Terje Bergstr?m <tbergstrom@nvidia.com> \n"
  "wrote:\n"
  " > On 30.10.2014 12:03, Alexandre Courbot wrote:\n"
  " >> I had to change the .reg of TEGRA_SWGROUP_GPU to 0xaac to get the IOMMU\n"
@@ -41,4 +33,4 @@
  "34 set (hence forcibly disabled) while GPUB is used when that bit is \n"
  set? Or is it something else?
 
-1800d92c5bc5b2d49f831455a94a783cb410d66513aa227ab1412d74f78eca4b
+1003e7044e1b1fa1f006079c635e14fe8b2daeed079af9720b762c7c1a8277d9

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