diff for duplicates of <54574FF7.706@arm.com> diff --git a/a/1.txt b/N1/1.txt index 5647eaa..04a1918 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,6 +1,6 @@ Hi Suravee, -On 31/10/14 08:26, suravee.suthikulpanit@amd.com wrote: +On 31/10/14 08:26, suravee.suthikulpanit at amd.com wrote: > From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> > > ARM GICv2m specification extends GICv2 to support MSI(-X) with @@ -63,7 +63,7 @@ On 31/10/14 08:26, suravee.suthikulpanit@amd.com wrote: > + > +Example: > + -> + interrupt-controller@e1101000 { +> + interrupt-controller at e1101000 { > + compatible = "arm,gic-400"; > + #interrupt-cells = <3>; > + #address-cells = <2>; @@ -75,7 +75,7 @@ On 31/10/14 08:26, suravee.suthikulpanit@amd.com wrote: > + <0x0 0xe112f000 0 0x02000>, > + <0x0 0xe1140000 0 0x10000>, > + <0x0 0xe1160000 0 0x10000>; -> + v2m0: v2m@0x8000 { +> + v2m0: v2m at 0x8000 { > + compatible = "arm,gic-v2m-frame"; > + msi-controller; > + reg = <0x0 0x80000 0 0x1000>; @@ -83,7 +83,7 @@ On 31/10/14 08:26, suravee.suthikulpanit@amd.com wrote: > + > + .... > + -> + v2mN: v2m@0x9000 { +> + v2mN: v2m at 0x9000 { > + compatible = "arm,gic-v2m-frame"; > + msi-controller; > + reg = <0x0 0x90000 0 0x1000>; diff --git a/a/content_digest b/N1/content_digest index 0e19e68..bd7f195 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,26 +1,14 @@ "ref\01414743990-28421-1-git-send-email-suravee.suthikulpanit@amd.com\0" "ref\01414743990-28421-3-git-send-email-suravee.suthikulpanit@amd.com\0" - "From\0Marc Zyngier <marc.zyngier@arm.com>\0" - "Subject\0Re: [V9 PATCH 2/2] irqchip: gicv2m: Add supports for ARM GICv2m MSI(-X)\0" + "From\0marc.zyngier@arm.com (Marc Zyngier)\0" + "Subject\0[V9 PATCH 2/2] irqchip: gicv2m: Add supports for ARM GICv2m MSI(-X)\0" "Date\0Mon, 03 Nov 2014 09:50:47 +0000\0" - "To\0suravee.suthikulpanit@amd.com <suravee.suthikulpanit@amd.com>\0" - "Cc\0Mark Rutland <Mark.Rutland@arm.com>" - jason@lakedaemon.net <jason@lakedaemon.net> - tglx@linutronix.de <tglx@linutronix.de> - Catalin Marinas <Catalin.Marinas@arm.com> - Will Deacon <Will.Deacon@arm.com> - Liviu Dudau <Liviu.Dudau@arm.com> - Harish.Kasiviswanathan@amd.com <Harish.Kasiviswanathan@amd.com> - linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> - linux-pci@vger.kernel.org <linux-pci@vger.kernel.org> - linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> - linux-doc@vger.kernel.org <linux-doc@vger.kernel.org> - " devicetree@vger.kernel.org <devicetree@vger.kernel.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Hi Suravee,\n" "\n" - "On 31/10/14 08:26, suravee.suthikulpanit@amd.com wrote:\n" + "On 31/10/14 08:26, suravee.suthikulpanit at amd.com wrote:\n" "> From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>\n" "> \n" "> ARM GICv2m specification extends GICv2 to support MSI(-X) with\n" @@ -83,7 +71,7 @@ "> +\n" "> +Example:\n" "> +\n" - "> + interrupt-controller@e1101000 {\n" + "> + interrupt-controller at e1101000 {\n" "> + compatible = \"arm,gic-400\";\n" "> + #interrupt-cells = <3>;\n" "> + #address-cells = <2>;\n" @@ -95,7 +83,7 @@ "> + <0x0 0xe112f000 0 0x02000>,\n" "> + <0x0 0xe1140000 0 0x10000>,\n" "> + <0x0 0xe1160000 0 0x10000>;\n" - "> + v2m0: v2m@0x8000 {\n" + "> + v2m0: v2m at 0x8000 {\n" "> + compatible = \"arm,gic-v2m-frame\";\n" "> + msi-controller;\n" "> + reg = <0x0 0x80000 0 0x1000>;\n" @@ -103,7 +91,7 @@ "> +\n" "> + ....\n" "> +\n" - "> + v2mN: v2m@0x9000 {\n" + "> + v2mN: v2m at 0x9000 {\n" "> + compatible = \"arm,gic-v2m-frame\";\n" "> + msi-controller;\n" "> + reg = <0x0 0x90000 0 0x1000>;\n" @@ -632,4 +620,4 @@ "-- \n" Jazz is not dead. It just smells funny... -36f2360111d05163399f49148adf39f0e915308604211ee686d8ec68b7212d9f +beb9d2f40eb4eabc72b18011bbf7943ccae113f17b28a43aa5d432e9587c9fb4
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