From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [PATCH] target-i386: add Intel AVX-512 support Date: Mon, 03 Nov 2014 12:31:42 +0100 Message-ID: <5457679E.4030308@redhat.com> References: <1414033363-31032-1-git-send-email-chao.p.peng@linux.intel.com> <20141102101909.GA31841@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Cc: qemu-devel@nongnu.org, =?windows-1252?Q?Andreas_F=E4rber?= , Marcelo Tosatti , Vadim Rozenfeld , Laszlo Ersek , kvm@vger.kernel.org To: "Michael S. Tsirkin" , Chao Peng Return-path: Received: from mx1.redhat.com ([209.132.183.28]:51382 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751033AbaKCLbx (ORCPT ); Mon, 3 Nov 2014 06:31:53 -0500 In-Reply-To: <20141102101909.GA31841@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On 02/11/2014 11:19, Michael S. Tsirkin wrote: > > Add AVX512 feature bits, register definition and corresponding > > xsave/vmstate support. > > > > Signed-off-by: Chao Peng > > Thanks! > > As this was first posted after soft freeze, please > resubmit after 2.2 is out. > > See schedule http://wiki.qemu.org/Planning/2.2 Actually this is already in. While "Planning/2.2" says "all features should have patches posted on the mailing list", the actual page describing soft feature freeze is more lenient: By the date of the soft feature freeze, any non-trivial feature should have some code posted to the qemu-devel mailing list if it's targeting a given release. Major features, and in particular features with a high likelihood of breaking things, should already be in the process of being merged. This patch was fairly trivial, as it only adds a few memcpys and a subsection. Likelihood of breaking things is basically zero because AVX512 does not yet exist in silicon. Eduardo reviewed the patch promptly and agreed with putting it in 2.2, so that's what I did. Paolo From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33632) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XlFrX-0002ju-ND for qemu-devel@nongnu.org; Mon, 03 Nov 2014 06:32:00 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XlFrT-0002iB-9Y for qemu-devel@nongnu.org; Mon, 03 Nov 2014 06:31:55 -0500 Received: from mx1.redhat.com ([209.132.183.28]:55794) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XlFrT-0002gD-2P for qemu-devel@nongnu.org; Mon, 03 Nov 2014 06:31:51 -0500 Message-ID: <5457679E.4030308@redhat.com> Date: Mon, 03 Nov 2014 12:31:42 +0100 From: Paolo Bonzini MIME-Version: 1.0 References: <1414033363-31032-1-git-send-email-chao.p.peng@linux.intel.com> <20141102101909.GA31841@redhat.com> In-Reply-To: <20141102101909.GA31841@redhat.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] target-i386: add Intel AVX-512 support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" , Chao Peng Cc: kvm@vger.kernel.org, Marcelo Tosatti , qemu-devel@nongnu.org, Vadim Rozenfeld , Laszlo Ersek , =?windows-1252?Q?Andreas_F=E4rber?= On 02/11/2014 11:19, Michael S. Tsirkin wrote: > > Add AVX512 feature bits, register definition and corresponding > > xsave/vmstate support. > > > > Signed-off-by: Chao Peng > > Thanks! > > As this was first posted after soft freeze, please > resubmit after 2.2 is out. > > See schedule http://wiki.qemu.org/Planning/2.2 Actually this is already in. While "Planning/2.2" says "all features should have patches posted on the mailing list", the actual page describing soft feature freeze is more lenient: By the date of the soft feature freeze, any non-trivial feature should have some code posted to the qemu-devel mailing list if it's targeting a given release. Major features, and in particular features with a high likelihood of breaking things, should already be in the process of being merged. This patch was fairly trivial, as it only adds a few memcpys and a subsection. Likelihood of breaking things is basically zero because AVX512 does not yet exist in silicon. Eduardo reviewed the patch promptly and agreed with putting it in 2.2, so that's what I did. Paolo