From: Joshua Kinard <kumba@gentoo.org>
To: Ralf Baechle <ralf@linux-mips.org>, David Daney <ddaney.cavm@gmail.com>
Cc: Linux MIPS List <linux-mips@linux-mips.org>
Subject: Re: IP27: CONFIG_TRANSPARENT_HUGEPAGE triggers bus errors
Date: Fri, 07 Nov 2014 05:22:05 -0500 [thread overview]
Message-ID: <545C9D4D.4090501@gentoo.org> (raw)
In-Reply-To: <20141105160945.GB13785@linux-mips.org>
On 11/05/2014 11:09, Ralf Baechle wrote:
> On Mon, Nov 03, 2014 at 05:23:29PM -0800, David Daney wrote:
>
>> I haven't checked, but there may be workarounds required in the TLB
>> management code that are not in place for the huge page case. When the huge
>> TLB code was developed, we didn't do any testing on R10K. Somebody should
>> dump the exception handlers and carefully look at the rest of the huge TLB
>> management code, and check to see that any required workarounds are in
>> place.
>
> Joshua, if you happen to have R10000 errata sheets around, maybe you could
> check if there's anything suspicious? Off the top of my head I don't recall
> any R10000 TLB erratas but the R10000 had plenty of erratas due to it's - by
> the standards of the time - high complexity.
>
> Ralf
All I have are errata sheets for Rev 2.3, 2.4, and 2.5 of the R10K. Nothing
specific on the R12K, and nil for the R14K/R16K.
That said, poking through other areas of the R10K/R12K User Manual, there are
paragraphs titled "Errata" and regarding the PageMask register or TLB, they
state this:
Page 41
The calculated address is translated from a 44-bit virtual address into a
40-bit physical address using a translation-lookaside buffer. The TLB contains
64 entries, each of which can translate two pages. Each entry can select a page
size ranging from 4 Kbytes to 16 Mbytes, inclusive, in __powers__ of 4, as
shown in Figure 1-6.
Page 316:
Translated virtual addresses retrieve data in blocks, which are called pages.
In the R10000 processor, the size of each page may be selected from a range
that runs from 4 Kbytes to 16 Mbytes inclusive, __in_powers_of_4__ (that is, 4
Kbytes, 16 Kbytes, 64 Kbytes, etc.).
So my guess is unless hugepages can happen in powers of 4, they're not
compatible w/ the R10K-series (and likely not the R5K/RM7K, either, since they
all have the same 24:13 bits in the PageMask register). It seems the logical
choice would be to remove 'select CPU_SUPPORTS_HUGEPAGES' from CPU_R5000,
CPU_NEVADA, CPU_R10000, and CPU_RM7000 in arch/mips/Kconfig.
--
Joshua Kinard
Gentoo/MIPS
kumba@gentoo.org
4096R/D25D95E3 2011-03-28
"The past tempts us, the present confuses us, the future frightens us. And our
lives slip away, moment by moment, lost in that vast, terrible in-between."
--Emperor Turhan, Centauri Republic
next prev parent reply other threads:[~2014-11-07 10:22 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-02 10:53 IP27: CONFIG_TRANSPARENT_HUGEPAGE triggers bus errors Joshua Kinard
2014-11-03 18:52 ` David Daney
2014-11-04 1:08 ` Joshua Kinard
2014-11-04 1:23 ` David Daney
2014-11-04 1:34 ` Joshua Kinard
2014-11-04 1:43 ` David Daney
2014-11-04 5:51 ` Joshua Kinard
2014-11-05 9:07 ` Joshua Kinard
2014-11-05 10:21 ` Ralf Baechle
2014-11-05 16:09 ` Ralf Baechle
2014-11-07 10:22 ` Joshua Kinard [this message]
2014-11-07 18:30 ` David Daney
2014-11-09 0:09 ` Joshua Kinard
2014-11-10 7:04 ` Joshua Kinard
2014-11-10 10:51 ` Ralf Baechle
2014-11-10 11:20 ` Thomas Bogendoerfer
2014-11-10 14:22 ` Joshua Kinard
2014-11-10 16:55 ` David Daney
2014-11-10 17:03 ` Ralf Baechle
2014-11-10 17:29 ` David Daney
2014-11-11 11:11 ` Joshua Kinard
2014-11-10 21:30 ` Thomas Bogendoerfer
2014-11-11 7:47 ` Ralf Baechle
2014-11-11 9:24 ` Thomas Bogendoerfer
2014-11-11 9:38 ` Ralf Baechle
2014-11-10 11:22 ` Joshua Kinard
2014-11-05 13:52 ` Ralf Baechle
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