From mboxrd@z Thu Jan 1 00:00:00 1970 From: gregory.clement@free-electrons.com (Gregory CLEMENT) Date: Mon, 10 Nov 2014 15:15:17 +0100 Subject: [PATCH 16/17] ARM: mvebu: adjust mbus controller description on Armada 370/XP In-Reply-To: <1414151970-6626-17-git-send-email-thomas.petazzoni@free-electrons.com> References: <1414151970-6626-1-git-send-email-thomas.petazzoni@free-electrons.com> <1414151970-6626-17-git-send-email-thomas.petazzoni@free-electrons.com> Message-ID: <5460C875.4090609@free-electrons.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Thomas, On 24/10/2014 13:59, Thomas Petazzoni wrote: > In order to support suspend/resume on Armada XP, an additional set of > registers need to be described at the MBus controller level. This > commit therefore adjusts the Device Tree of the Armada 370/XP SoC to > include those registers in the MBus controller description; > Acked-by: Gregory CLEMENT Thanks, Gregory > Signed-off-by: Thomas Petazzoni > --- > arch/arm/boot/dts/armada-370-xp.dtsi | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi > index 83286ec..90dba78 100644 > --- a/arch/arm/boot/dts/armada-370-xp.dtsi > +++ b/arch/arm/boot/dts/armada-370-xp.dtsi > @@ -180,7 +180,8 @@ > > mbusc: mbus-controller at 20000 { > compatible = "marvell,mbus-controller"; > - reg = <0x20000 0x100>, <0x20180 0x20>; > + reg = <0x20000 0x100>, <0x20180 0x20>, > + <0x20250 0x8>; > }; > > mpic: interrupt-controller at 20000 { > -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gregory CLEMENT Subject: Re: [PATCH 16/17] ARM: mvebu: adjust mbus controller description on Armada 370/XP Date: Mon, 10 Nov 2014 15:15:17 +0100 Message-ID: <5460C875.4090609@free-electrons.com> References: <1414151970-6626-1-git-send-email-thomas.petazzoni@free-electrons.com> <1414151970-6626-17-git-send-email-thomas.petazzoni@free-electrons.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1414151970-6626-17-git-send-email-thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Thomas Petazzoni Cc: Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Tawfik Bayouk , Nadav Haklai , Lior Amsalem , Ezequiel Garcia , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org Hi Thomas, On 24/10/2014 13:59, Thomas Petazzoni wrote: > In order to support suspend/resume on Armada XP, an additional set of > registers need to be described at the MBus controller level. This > commit therefore adjusts the Device Tree of the Armada 370/XP SoC to > include those registers in the MBus controller description; > Acked-by: Gregory CLEMENT Thanks, Gregory > Signed-off-by: Thomas Petazzoni > --- > arch/arm/boot/dts/armada-370-xp.dtsi | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi > index 83286ec..90dba78 100644 > --- a/arch/arm/boot/dts/armada-370-xp.dtsi > +++ b/arch/arm/boot/dts/armada-370-xp.dtsi > @@ -180,7 +180,8 @@ > > mbusc: mbus-controller@20000 { > compatible = "marvell,mbus-controller"; > - reg = <0x20000 0x100>, <0x20180 0x20>; > + reg = <0x20000 0x100>, <0x20180 0x20>, > + <0x20250 0x8>; > }; > > mpic: interrupt-controller@20000 { > -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html