diff for duplicates of <54616557.1010403@amd.com> diff --git a/a/1.txt b/N1/1.txt index 6279036..d0f94cb 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -6,7 +6,7 @@ Thanks, Suravee -On 10/28/14 20:36, suravee.suthikulpanit at amd.com wrote: +On 10/28/14 20:36, suravee.suthikulpanit@amd.com wrote: > From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> > > Initial revision of device tree for AMD Seattle platform @@ -121,7 +121,7 @@ On 10/28/14 20:36, suravee.suthikulpanit at amd.com wrote: > + clock-output-names = "uartspiclk_100mhz"; > + }; > + -> + dma0: dma at 0500000 { +> + dma0: dma@0500000 { > + compatible = "arm,pl330", "arm,primecell"; > + reg = <0 0x0500000 0 0x1000>; > + interrupts = @@ -138,7 +138,7 @@ On 10/28/14 20:36, suravee.suthikulpanit at amd.com wrote: > + #dma-cells = <1>; > + }; > + -> + sata0: sata at 00300000 { +> + sata0: sata@00300000 { > + compatible = "snps,dwc-ahci"; > + reg = <0 0x300000 0 0x800>; > + interrupts = <0 355 4>; @@ -147,7 +147,7 @@ On 10/28/14 20:36, suravee.suthikulpanit at amd.com wrote: > + dma-coherent; > + }; > + -> + i2c at 1000000 { +> + i2c@1000000 { > + compatible = "snps,designware-i2c"; > + reg = <0 0x01000000 0 0x1000>; > + interrupts = <0 357 4>; @@ -155,7 +155,7 @@ On 10/28/14 20:36, suravee.suthikulpanit at amd.com wrote: > + clock-names = "apb_pclk"; > + }; > + -> + serial0: serial at 1010000 { +> + serial0: serial@1010000 { > + compatible = "arm,pl011", "arm,primecell"; > + reg = <0 0x1010000 0 0x1000>; > + interrupts = <0 328 4>; @@ -163,7 +163,7 @@ On 10/28/14 20:36, suravee.suthikulpanit at amd.com wrote: > + clock-names = "uartclk", "apb_pclk"; > + }; > + -> + ssp at 1020000 { +> + ssp@1020000 { > + compatible = "arm,pl022", "arm,primecell"; > + #gpio-cells = <2>; > + reg = <0 0x1020000 0 0x1000>; @@ -173,7 +173,7 @@ On 10/28/14 20:36, suravee.suthikulpanit at amd.com wrote: > + clock-names = "apb_pclk"; > + }; > + -> + ssp at 1030000 { +> + ssp@1030000 { > + compatible = "arm,pl022", "arm,primecell"; > + #gpio-cells = <2>; > + reg = <0 0x1030000 0 0x1000>; @@ -185,7 +185,7 @@ On 10/28/14 20:36, suravee.suthikulpanit at amd.com wrote: > + #address-cells = <1>; > + #size-cells = <0>; > + -> + sdcard at 0 { +> + sdcard@0 { > + compatible = "mmc-spi-slot"; > + reg = <0>; > + spi-max-frequency = <20000000>; @@ -197,7 +197,7 @@ On 10/28/14 20:36, suravee.suthikulpanit at amd.com wrote: > + }; > + }; > + -> + gpio0: gpio at 1040000 { +> + gpio0: gpio@1040000 { > + compatible = "arm,pl061", "arm,primecell"; > + #gpio-cells = <2>; > + reg = <0 0x1040000 0 0x1000>; @@ -207,7 +207,7 @@ On 10/28/14 20:36, suravee.suthikulpanit at amd.com wrote: > + clock-names = "apb_pclk"; > + }; > + -> + gpio1: gpio at 1050000 { +> + gpio1: gpio@1050000 { > + compatible = "arm,pl061", "arm,primecell"; > + #gpio-cells = <2>; > + reg = <0 0x1050000 0 0x1000>; @@ -217,7 +217,7 @@ On 10/28/14 20:36, suravee.suthikulpanit at amd.com wrote: > + clock-names = "apb_pclk"; > + }; > + -> + ccp: ccp at 00100000 { +> + ccp: ccp@00100000 { > + compatible = "amd,ccp-seattle-v1a"; > + reg = <0 0x00100000 0 0x10000>; > + interrupts = <0 3 4>; @@ -249,7 +249,7 @@ On 10/28/14 20:36, suravee.suthikulpanit at amd.com wrote: > + linux,pci-probe-only; > + }; > + -> + gic: interrupt-controller at e1101000 { +> + gic: interrupt-controller@e1101000 { > + compatible = "arm,gic-400", "arm,cortex-a15-gic"; > + interrupt-controller; > + #interrupt-cells = <3>; @@ -261,7 +261,7 @@ On 10/28/14 20:36, suravee.suthikulpanit at amd.com wrote: > + <0x0 0xe1160000 0 0x10000>; > + interrupts = <1 8 0xf04>; > + ranges; -> + v2m0: v2m at e1180000 { +> + v2m0: v2m@e1180000 { > + compatible = "arm,gic-v2m-frame"; > + msi-controller; > + arm,msi-base-spi = <64>; diff --git a/a/content_digest b/N1/content_digest index e71124c..3d31544 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,8 +1,16 @@ "ref\01414503414-3863-1-git-send-email-suravee.suthikulpanit@amd.com\0" - "From\0Suravee.Suthikulpanit@amd.com (Suravee Suthikulpanit)\0" - "Subject\0[PATCH V3] arm64: amd-seattle: Adding device tree for AMD Seattle platform\0" + "From\0Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>\0" + "Subject\0Re: [PATCH V3] arm64: amd-seattle: Adding device tree for AMD Seattle platform\0" "Date\0Tue, 11 Nov 2014 08:24:39 +0700\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0<mark.rutland@arm.com>" + <will.deacon@arm.com> + " <catalin.marinas@arm.com>\0" + "Cc\0<marc.zyngier@arm.com>" + <liviu.dudau@arm.com> + <linux-arm-kernel@lists.infradead.org> + <linux-kernel@vger.kernel.org> + Thomas Lendacky <Thomas.Lendacky@amd.com> + " Joel Schopp <Joel.Schopp@amd.com>\0" "\00:1\0" "b\0" "Ping.\n" @@ -13,7 +21,7 @@ "\n" "Suravee\n" "\n" - "On 10/28/14 20:36, suravee.suthikulpanit at amd.com wrote:\n" + "On 10/28/14 20:36, suravee.suthikulpanit@amd.com wrote:\n" "> From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>\n" ">\n" "> Initial revision of device tree for AMD Seattle platform\n" @@ -128,7 +136,7 @@ "> +\t\tclock-output-names = \"uartspiclk_100mhz\";\n" "> +\t};\n" "> +\n" - "> +\tdma0: dma at 0500000 {\n" + "> +\tdma0: dma@0500000 {\n" "> +\t\tcompatible = \"arm,pl330\", \"arm,primecell\";\n" "> +\t\treg = <0 0x0500000 0 0x1000>;\n" "> +\t\tinterrupts =\n" @@ -145,7 +153,7 @@ "> +\t\t#dma-cells = <1>;\n" "> +\t};\n" "> +\n" - "> +\tsata0: sata at 00300000 {\n" + "> +\tsata0: sata@00300000 {\n" "> +\t\tcompatible = \"snps,dwc-ahci\";\n" "> +\t\treg = <0 0x300000 0 0x800>;\n" "> +\t\tinterrupts = <0 355 4>;\n" @@ -154,7 +162,7 @@ "> +\t\tdma-coherent;\n" "> +\t};\n" "> +\n" - "> +\ti2c at 1000000 {\n" + "> +\ti2c@1000000 {\n" "> +\t\tcompatible = \"snps,designware-i2c\";\n" "> +\t\treg = <0 0x01000000 0 0x1000>;\n" "> +\t\tinterrupts = <0 357 4>;\n" @@ -162,7 +170,7 @@ "> +\t\tclock-names = \"apb_pclk\";\n" "> +\t};\n" "> +\n" - "> +\tserial0: serial at 1010000 {\n" + "> +\tserial0: serial@1010000 {\n" "> +\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n" "> +\t\treg = <0 0x1010000 0 0x1000>;\n" "> +\t\tinterrupts = <0 328 4>;\n" @@ -170,7 +178,7 @@ "> +\t\tclock-names = \"uartclk\", \"apb_pclk\";\n" "> +\t};\n" "> +\n" - "> +\tssp at 1020000 {\n" + "> +\tssp@1020000 {\n" "> +\t\tcompatible = \"arm,pl022\", \"arm,primecell\";\n" "> +\t\t#gpio-cells = <2>;\n" "> +\t\treg = <0 0x1020000 0 0x1000>;\n" @@ -180,7 +188,7 @@ "> +\t\tclock-names = \"apb_pclk\";\n" "> +\t};\n" "> +\n" - "> +\tssp at 1030000 {\n" + "> +\tssp@1030000 {\n" "> +\t\tcompatible = \"arm,pl022\", \"arm,primecell\";\n" "> +\t\t#gpio-cells = <2>;\n" "> +\t\treg = <0 0x1030000 0 0x1000>;\n" @@ -192,7 +200,7 @@ "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\tsdcard at 0 {\n" + "> +\t\tsdcard@0 {\n" "> +\t\t\tcompatible = \"mmc-spi-slot\";\n" "> +\t\t\treg = <0>;\n" "> +\t\t\tspi-max-frequency = <20000000>;\n" @@ -204,7 +212,7 @@ "> +\t\t};\n" "> +\t};\n" "> +\n" - "> +\tgpio0: gpio at 1040000 {\n" + "> +\tgpio0: gpio@1040000 {\n" "> +\t\tcompatible = \"arm,pl061\", \"arm,primecell\";\n" "> +\t\t#gpio-cells = <2>;\n" "> +\t\treg = <0 0x1040000 0 0x1000>;\n" @@ -214,7 +222,7 @@ "> +\t\tclock-names = \"apb_pclk\";\n" "> +\t};\n" "> +\n" - "> +\tgpio1: gpio at 1050000 {\n" + "> +\tgpio1: gpio@1050000 {\n" "> +\t\tcompatible = \"arm,pl061\", \"arm,primecell\";\n" "> +\t\t#gpio-cells = <2>;\n" "> +\t\treg = <0 0x1050000 0 0x1000>;\n" @@ -224,7 +232,7 @@ "> +\t\tclock-names = \"apb_pclk\";\n" "> +\t};\n" "> +\n" - "> +\tccp: ccp at 00100000 {\n" + "> +\tccp: ccp@00100000 {\n" "> +\t\tcompatible = \"amd,ccp-seattle-v1a\";\n" "> +\t\treg = <0 0x00100000 0 0x10000>;\n" "> +\t\tinterrupts = <0 3 4>;\n" @@ -256,7 +264,7 @@ "> +\t\tlinux,pci-probe-only;\n" "> +\t};\n" "> +\n" - "> +\tgic: interrupt-controller at e1101000 {\n" + "> +\tgic: interrupt-controller@e1101000 {\n" "> +\t\tcompatible = \"arm,gic-400\", \"arm,cortex-a15-gic\";\n" "> +\t\tinterrupt-controller;\n" "> +\t\t#interrupt-cells = <3>;\n" @@ -268,7 +276,7 @@ "> +\t\t <0x0 0xe1160000 0 0x10000>;\n" "> +\t\tinterrupts = <1 8 0xf04>;\n" "> +\t\tranges;\n" - "> +\t\tv2m0: v2m at e1180000 {\n" + "> +\t\tv2m0: v2m@e1180000 {\n" "> +\t\t\tcompatible = \"arm,gic-v2m-frame\";\n" "> +\t\t\tmsi-controller;\n" "> +\t\t\tarm,msi-base-spi = <64>;\n" @@ -361,4 +369,4 @@ "> +};\n" > -5c7874526a6db00c2ea930a54cfe693faf8484e8daa533be1f2f5df24b52c2c4 +a22a8e17b0f3223e8b59542280645b80d120f4b3e0dedbf6129c3dff608b5565
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