Re: [PATCH/RFC 4/8] serial: pxa: Add fifo-size and {big,native}-endian properties

[Jiri Slaby <jslaby@suse.cz>]

On 11/12/2014, 09:46 AM, Kevin Cernekee wrote:
> With a few tweaks, the PXA serial driver can handle other 16550A clones.
> Add a fifo-size DT property to override the FIFO depth (BCM7xxx uses 32),
> and {native,big}-endian properties similar to regmap to support SoCs that
> have BE or "automagic endian" registers.
> 
> Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
> ---
>  drivers/tty/serial/pxa.c | 16 ++++++++++++++--
>  1 file changed, 14 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/tty/serial/pxa.c b/drivers/tty/serial/pxa.c
> index 21b7d8b..78ed7ee 100644
> --- a/drivers/tty/serial/pxa.c
> +++ b/drivers/tty/serial/pxa.c
> @@ -60,13 +60,19 @@ struct uart_pxa_port {
>  static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
>  {
>  	offset <<= 2;
> -	return readl(up->port.membase + offset);
> +	if (!up->port.big_endian)
> +		return readl(up->port.membase + offset);
> +	else
> +		return ioread32be(up->port.membase + offset);

This needn't fly IMO, unless you map the space using iomap (not ioremap).

-- 
js
suse labs