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Date: Thu, 13 Nov 2014 10:39:39 +0000
From: Leon Alrae <leon.alrae@imgtec.com>
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Subject: Re: [Qemu-devel] [PATCH v4 14/21] target-mips: add AUI,
 LSA and PCREL instruction families
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To: Paolo Bonzini <pbonzini@redhat.com>, qemu-devel@nongnu.org
Cc: yongbok.kim@imgtec.com, cristian.cuna@imgtec.com, james.hogan@imgtec.com, aurelien@aurel32.net, rth@twiddle.net

On 12/11/2014 21:07, Paolo Bonzini wrote:
> 
> 
> On 08/10/2014 12:55, Leon Alrae wrote:
>>      case OPC_LUI:
>> -        tcg_gen_movi_tl(cpu_gpr[rt], imm << 16);
>> -        MIPS_DEBUG("lui %s, " TARGET_FMT_lx, regnames[rt], uimm);
>> +        if (rs != 0 && (ctx->insn_flags & ISA_MIPS32R6)) {
>> +            /* OPC_AUI */
>> +            tcg_gen_addi_tl(cpu_gpr[rt], cpu_gpr[rs], imm << 16);
>> +            tcg_gen_ext32s_tl(cpu_gpr[rt], cpu_gpr[rt]);
>> +            MIPS_DEBUG("aui %s, %s, %04x", regnames[rt], regnames[rs], imm);
>> +        } else {
>> +            tcg_gen_movi_tl(cpu_gpr[rt], imm << 16);
>> +            MIPS_DEBUG("lui %s, " TARGET_FMT_lx, regnames[rt], uimm);
>> +        }
>>          break;
> 
> Coverity reported a
> 
>     gen_logic_imm(ctx, OPC_LUI, rs, -1, imm);
> 
> where the -1 probably has to become zero now.

This line is from microMIPS decoder. We don't support microMIPS R6 in
QEMU so I think this isn't an issue at the moment as (ctx->insn_flags &
ISA_MIPS32R6) should always be false on a CPU with existing
implementation of microMIPS. Nevertheless, I agree this should be 0 for
safety, I'll correct it in 2.3.

Thanks for pointing this out.

Regards,
Leon