From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andy Yan Subject: Re: [PATCH v10 11/11] drm: bridge/dw_hdmi: add rockchip rk3288 support Date: Fri, 14 Nov 2014 18:37:03 +0800 Message-ID: <5465DB4F.7090402@rock-chips.com> References: <1415934583-16290-1-git-send-email-andy.yan@rock-chips.com> <1415935884-17130-1-git-send-email-andy.yan@rock-chips.com> <5465D816.3020708@imgtec.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: In-Reply-To: <5465D816.3020708-1AXoQHu6uovQT0dZR+AlfA@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Zubair Lutfullah Kakakhel , airlied-cv59FeDIM0c@public.gmane.org, heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org, fabio.estevam-KZfg59tc24xl57MIdRCFDg@public.gmane.org, rmk+kernel-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org Cc: Mark Rutland , dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, ykk-TNX95d0MmH7DzftRWevZcw@public.gmane.org, devel-gWbeCf7V1WCQmaza687I9mD2FQJk+8+b@public.gmane.org, Arnd Bergmann , linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Grant Likely , Dave Airlie , jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Pawel Moll , Ian Campbell , Inki Dae , Rob Herring , Sean Paul , mark.yao-TNX95d0MmH7DzftRWevZcw@public.gmane.org, Josh Boyer , Greg Kroah-Hartman , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, djkurtz-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org, Philipp Zabel , Kumar Gala , Shawn Guo , Lucas Stach List-Id: devicetree@vger.kernel.org On 2014=E5=B9=B411=E6=9C=8814=E6=97=A5 18:23, Zubair Lutfullah Kakakhel= wrote: > Hi Andy > > On 14/11/14 03:31, Andy Yan wrote: >> Rockchip RK3288 hdmi is compatible with dw_hdmi >> >> Signed-off-by: Andy Yan >> >> --- >> >> Changes in v10: >> - add more display mode support mpll configuration for rk3288 >> >> Changes in v9: >> - move some phy configuration to platform driver >> >> Changes in v8: None >> Changes in v7: None >> Changes in v6: None >> Changes in v5: None >> Changes in v4: None >> Changes in v3: None >> Changes in v2: None >> >> drivers/gpu/drm/bridge/dw_hdmi.c | 10 + >> drivers/gpu/drm/bridge/dw_hdmi.h | 3 +- >> drivers/gpu/drm/rockchip/Kconfig | 10 + >> drivers/gpu/drm/rockchip/Makefile | 2 +- >> drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 355 ++++++++++++++++= ++++++++++++ >> include/drm/bridge/dw_hdmi.h | 1 + >> 6 files changed, 379 insertions(+), 2 deletions(-) >> create mode 100644 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c >> >> diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/brid= ge/dw_hdmi.c >> index a2876fe..1dd1f0b 100644 >> --- a/drivers/gpu/drm/bridge/dw_hdmi.c >> +++ b/drivers/gpu/drm/bridge/dw_hdmi.c >> @@ -715,6 +715,13 @@ static void dw_hdmi_phy_enable_tmds(struct dw_h= dmi *hdmi, u8 enable) >> HDMI_PHY_CONF0_ENTMDS_MASK); >> } >> =20 >> +static void dw_hdmi_phy_enable_spare(struct dw_hdmi *hdmi, u8 enabl= e) >> +{ >> + hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, >> + HDMI_PHY_CONF0_SPARECTRL_OFFSET, >> + HDMI_PHY_CONF0_SPARECTRL_MASK); >> +} >> + > What does enable spare do? Can other future SoCs use it? > > This looks like DW specific. And can be a separate commit that adds a= feature to the dw hdmi driver. Actually I am not very clearly about this bit, but RK3288 HDMI will=20 not work without this bit enable. On imx6, the description about this bit is:Reserved. Spare pin contr= ol. On rk3288, the description is: svsret/sparectrl Both are very simple. > Thanks > ZubairLK > >> static void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable) >> { >> hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, >> @@ -846,6 +853,9 @@ static int hdmi_phy_configure(struct dw_hdmi *hd= mi, unsigned char prep, >> dw_hdmi_phy_gen2_txpwron(hdmi, 1); >> dw_hdmi_phy_gen2_pddq(hdmi, 0); >> =20 >> + if (hdmi->dev_type =3D=3D RK3288_HDMI) >> + dw_hdmi_phy_enable_spare(hdmi, 1); >> + >> /*Wait for PHY PLL lock */ >> msec =3D 5; >> do { >> diff --git a/drivers/gpu/drm/bridge/dw_hdmi.h b/drivers/gpu/drm/brid= ge/dw_hdmi.h >> index b8412a9..30a6b28 100644 >> --- a/drivers/gpu/drm/bridge/dw_hdmi.h >> +++ b/drivers/gpu/drm/bridge/dw_hdmi.h >> @@ -837,7 +837,8 @@ enum { >> HDMI_PHY_CONF0_PDZ_OFFSET =3D 7, >> HDMI_PHY_CONF0_ENTMDS_MASK =3D 0x40, >> HDMI_PHY_CONF0_ENTMDS_OFFSET =3D 6, >> - HDMI_PHY_CONF0_SPARECTRL =3D 0x20, >> + HDMI_PHY_CONF0_SPARECTRL_MASK =3D 0x20, >> + HDMI_PHY_CONF0_SPARECTRL_OFFSET =3D 5, > Cheers, > ZubairLK > > > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip > > > -- To unsubscribe from this list: send the line "unsubscribe devicetree" i= n the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965093AbaKNKh0 (ORCPT ); Fri, 14 Nov 2014 05:37:26 -0500 Received: from va-smtp01.263.net ([54.88.144.211]:53939 "EHLO va-smtp01.263.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754907AbaKNKhY (ORCPT ); Fri, 14 Nov 2014 05:37:24 -0500 X-RL-SENDER: andy.yan@rock-chips.com X-FST-TO: l.stach@pengutronix.de X-SENDER-IP: 121.15.173.1 X-LOGIN-NAME: andy.yan@rock-chips.com X-UNIQUE-TAG: <6af2f56f069a5bada2103ebc5494bfe4> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Message-ID: <5465DB4F.7090402@rock-chips.com> Date: Fri, 14 Nov 2014 18:37:03 +0800 From: Andy Yan User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.0 MIME-Version: 1.0 To: Zubair Lutfullah Kakakhel , airlied@linux.ie, heiko@sntech.de, fabio.estevam@freescale.com, rmk+kernel@arm.linux.org.uk CC: Mark Rutland , dri-devel@lists.freedesktop.org, ykk@rock-chips.com, devel@driverdev.osuosl.org, Arnd Bergmann , linux-rockchip@lists.infradead.org, Grant Likely , Dave Airlie , jay.xu@rock-chips.com, devicetree@vger.kernel.org, Pawel Moll , Ian Campbell , Inki Dae , Rob Herring , Sean Paul , mark.yao@rock-chips.com, Josh Boyer , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, djkurtz@google.com, Philipp Zabel , Kumar Gala , Shawn Guo , Lucas Stach Subject: Re: [PATCH v10 11/11] drm: bridge/dw_hdmi: add rockchip rk3288 support References: <1415934583-16290-1-git-send-email-andy.yan@rock-chips.com> <1415935884-17130-1-git-send-email-andy.yan@rock-chips.com> <5465D816.3020708@imgtec.com> In-Reply-To: <5465D816.3020708@imgtec.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2014年11月14日 18:23, Zubair Lutfullah Kakakhel wrote: > Hi Andy > > On 14/11/14 03:31, Andy Yan wrote: >> Rockchip RK3288 hdmi is compatible with dw_hdmi >> >> Signed-off-by: Andy Yan >> >> --- >> >> Changes in v10: >> - add more display mode support mpll configuration for rk3288 >> >> Changes in v9: >> - move some phy configuration to platform driver >> >> Changes in v8: None >> Changes in v7: None >> Changes in v6: None >> Changes in v5: None >> Changes in v4: None >> Changes in v3: None >> Changes in v2: None >> >> drivers/gpu/drm/bridge/dw_hdmi.c | 10 + >> drivers/gpu/drm/bridge/dw_hdmi.h | 3 +- >> drivers/gpu/drm/rockchip/Kconfig | 10 + >> drivers/gpu/drm/rockchip/Makefile | 2 +- >> drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 355 ++++++++++++++++++++++++++++ >> include/drm/bridge/dw_hdmi.h | 1 + >> 6 files changed, 379 insertions(+), 2 deletions(-) >> create mode 100644 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c >> >> diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c >> index a2876fe..1dd1f0b 100644 >> --- a/drivers/gpu/drm/bridge/dw_hdmi.c >> +++ b/drivers/gpu/drm/bridge/dw_hdmi.c >> @@ -715,6 +715,13 @@ static void dw_hdmi_phy_enable_tmds(struct dw_hdmi *hdmi, u8 enable) >> HDMI_PHY_CONF0_ENTMDS_MASK); >> } >> >> +static void dw_hdmi_phy_enable_spare(struct dw_hdmi *hdmi, u8 enable) >> +{ >> + hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, >> + HDMI_PHY_CONF0_SPARECTRL_OFFSET, >> + HDMI_PHY_CONF0_SPARECTRL_MASK); >> +} >> + > What does enable spare do? Can other future SoCs use it? > > This looks like DW specific. And can be a separate commit that adds a feature to the dw hdmi driver. Actually I am not very clearly about this bit, but RK3288 HDMI will not work without this bit enable. On imx6, the description about this bit is:Reserved. Spare pin control. On rk3288, the description is: svsret/sparectrl Both are very simple. > Thanks > ZubairLK > >> static void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable) >> { >> hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, >> @@ -846,6 +853,9 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep, >> dw_hdmi_phy_gen2_txpwron(hdmi, 1); >> dw_hdmi_phy_gen2_pddq(hdmi, 0); >> >> + if (hdmi->dev_type == RK3288_HDMI) >> + dw_hdmi_phy_enable_spare(hdmi, 1); >> + >> /*Wait for PHY PLL lock */ >> msec = 5; >> do { >> diff --git a/drivers/gpu/drm/bridge/dw_hdmi.h b/drivers/gpu/drm/bridge/dw_hdmi.h >> index b8412a9..30a6b28 100644 >> --- a/drivers/gpu/drm/bridge/dw_hdmi.h >> +++ b/drivers/gpu/drm/bridge/dw_hdmi.h >> @@ -837,7 +837,8 @@ enum { >> HDMI_PHY_CONF0_PDZ_OFFSET = 7, >> HDMI_PHY_CONF0_ENTMDS_MASK = 0x40, >> HDMI_PHY_CONF0_ENTMDS_OFFSET = 6, >> - HDMI_PHY_CONF0_SPARECTRL = 0x20, >> + HDMI_PHY_CONF0_SPARECTRL_MASK = 0x20, >> + HDMI_PHY_CONF0_SPARECTRL_OFFSET = 5, > Cheers, > ZubairLK > > > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip > > >