* [Qemu-devel] [PATCH] target-ppc: Altivec's mtvscr Decodes Wrong Register
@ 2014-11-14 20:01 Tom Musta
2014-11-15 12:37 ` Alexander Graf
0 siblings, 1 reply; 2+ messages in thread
From: Tom Musta @ 2014-11-14 20:01 UTC (permalink / raw)
To: qemu-devel, qemu-ppc; +Cc: Tom Musta, agraf
The Move to Vector Status and Control Register (mtvscr) instruction
uses VRB as the source register. Fix the code generator to correctly
decode the VRB field. That is, use "rB(ctx->opcode)" instead of
"rD(ctx->opcode)".
Signed-off-by: Tom Musta <tommusta@gmail.com>
---
target-ppc/translate.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 910ce56..d381632 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -6848,7 +6848,7 @@ static void gen_mtvscr(DisasContext *ctx)
gen_exception(ctx, POWERPC_EXCP_VPU);
return;
}
- p = gen_avr_ptr(rD(ctx->opcode));
+ p = gen_avr_ptr(rB(ctx->opcode));
gen_helper_mtvscr(cpu_env, p);
tcg_temp_free_ptr(p);
}
--
1.7.1
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2014-11-14 20:01 [Qemu-devel] [PATCH] target-ppc: Altivec's mtvscr Decodes Wrong Register Tom Musta
2014-11-15 12:37 ` Alexander Graf
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