From: Leon Alrae <leon.alrae@imgtec.com>
To: "Maciej W. Rozycki" <macro@codesourcery.com>, qemu-devel@nongnu.org
Cc: Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [PATCH] mips: Enable vectored interrupt support for the 74Kf CPU
Date: Mon, 17 Nov 2014 11:17:04 +0000 [thread overview]
Message-ID: <5469D930.7000700@imgtec.com> (raw)
In-Reply-To: <alpine.DEB.1.10.1411040407390.2881@tp.orcam.me.uk>
On 04/11/2014 15:42, Maciej W. Rozycki wrote:
> Enable vectored interrupt support for the 74Kf CPU, reflecting hardware.
>
> Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
> ---
> qemu-mips-config-74k-vint.diff
> Index: qemu-git-trunk/target-mips/translate_init.c
> ===================================================================
> --- qemu-git-trunk.orig/target-mips/translate_init.c 2014-11-04 03:39:48.458972962 +0000
> +++ qemu-git-trunk/target-mips/translate_init.c 2014-11-04 03:43:15.479004225 +0000
> @@ -331,7 +331,7 @@ static const mips_def_t mips_defs[] =
> (1 << CP0C1_CA),
> .CP0_Config2 = MIPS_CONFIG2,
> .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |
> - (0 << CP0C3_VInt),
> + (1 << CP0C3_VInt),
> .CP0_LLAddr_rw_bitmask = 0,
> .CP0_LLAddr_shift = 4,
> .SYNCI_Step = 32,
>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
prev parent reply other threads:[~2014-11-17 11:17 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-04 15:42 [Qemu-devel] [PATCH] mips: Enable vectored interrupt support for the 74Kf CPU Maciej W. Rozycki
2014-11-17 11:17 ` Leon Alrae [this message]
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