From mboxrd@z Thu Jan  1 00:00:00 1970
From: Julien Grall <julien.grall@linaro.org>
Subject: Re: [PATCH for-4.5 3/4] xen: arm: correct specific
 mappings for PCIE0 on X-Gene
Date: Tue, 18 Nov 2014 17:04:24 +0000
Message-ID: <546B7C18.7000102@linaro.org>
References: <1416329045.17982.27.camel@citrix.com>
	<1416329088-23328-3-git-send-email-ian.campbell@citrix.com>
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To: Ian Campbell <ian.campbell@citrix.com>, xen-devel@lists.xen.org
Cc: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>, Clark Laughlin <clark.laughlin@linaro.org>, tim@xen.org, stefano.stabellini@eu.citrix.com
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Hi Ian,

On 11/18/2014 04:44 PM, Ian Campbell wrote:
> The region assigned to PCIE0, according to the docs, is 0x0e000000000 to
> 0x10000000000. They make no distinction between PCI CFG and PCI IO mem within
> this range (in fact, I'm not sure that isn't up to the driver).
> 
> Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Julien Grall <julien.grall@linaro.org>

Regards,

-- 
Julien Grall