From mboxrd@z Thu Jan  1 00:00:00 1970
From: Julien Grall <julien.grall@linaro.org>
Subject: Re: [PATCH for-4.5 4/4] xen: arm: Support the other 4
 PCI buses on Xgene
Date: Tue, 18 Nov 2014 17:15:10 +0000
Message-ID: <546B7E9E.9040806@linaro.org>
References: <1416329045.17982.27.camel@citrix.com>
	<1416329088-23328-4-git-send-email-ian.campbell@citrix.com>
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To: Ian Campbell <ian.campbell@citrix.com>, xen-devel@lists.xen.org
Cc: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>, Clark Laughlin <clark.laughlin@linaro.org>, tim@xen.org, stefano.stabellini@eu.citrix.com
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Hi Ian,

On 11/18/2014 04:44 PM, Ian Campbell wrote:
> Currently we only establish specific mappings for pcie0, which is
> used on the Mustang platform. However at least McDivitt uses pcie3.
> So wire up all the others, based on whether the corresponding DT node
> is marked as available.
> 
> This results in no change for Mustang.

Hopefully, we will support PCI DT parsing in Xen 4.6!

> Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
> ---
> +/*
> + * Xen does not currently support mapping MMIO regions and interrupt
> + * for bus child devices (referenced via the "ranges" and
> + * "interrupt-map" properties to domain 0). Instead for now map the
> + * necessary resources manually.
> + */
> +static int xgene_storm_specific_mapping(struct domain *d)
> +{
> +    struct dt_device_node *node = NULL;

NIT: const struct

> +    int ret;
> +
> +    while ( (node = dt_find_compatible_node(node, "pci", "apm,xgene-pcie")) )
> +    {
> +        u64 addr;
> +
> +        /* Identify the bus via it's control register address */
> +        ret = dt_device_get_address(node, 0, &addr, NULL);
> +        if ( ret < 0 )
> +            return ret;
> +
> +        if ( !dt_device_is_available(node) )
> +            continue;
> +
> +       switch ( addr )
> +        {
> +        case 0x1f2b0000: /* PCIe0 */
> +            ret = xgene_storm_pcie_specific_mapping(d,
> +                0x0e000000000UL, 0x10000000000UL, 0xc2);
> +            break;
> +        case 0x1f2c0000: /* PCIe1 */
> +            ret = xgene_storm_pcie_specific_mapping(d,
> +                0x0d000000000UL, 0x0e000000000UL, 0xc8);
> +            break;
> +        case 0x1f2d0000: /* PCIe2 */
> +            ret = xgene_storm_pcie_specific_mapping(d,
> +                0x09000000000UL, 0x0a000000000UL, 0xce);
> +            break;
> +        case 0x1f500000: /* PCIe3 */
> +            ret = xgene_storm_pcie_specific_mapping(d,
> +                0x0a000000000UL, 0x0c000000000UL, 0xd4);
> +            break;
> +        case 0x1f510000: /* PCIe4 */
> +            ret = xgene_storm_pcie_specific_mapping(d,
> +                0x0c000000000UL, 0x0d000000000UL, 0xda);
> +            break;
> +
> +        default:
> +            /* Ignore unknown PCI busses */

I would add a
printk("Ignoring PCI busses %s\n", dt_node_full_name(dev));

> +            ret = 0;
> +            break;

continue? You can't assume the order of the PCI busses in the device tree.

> +        }
> +
> +        if ( ret < 0 )
> +            return ret;
> +
> +        printk("Mapped additional regions for PCIe device at 0x%"PRIx64"\n",
> +               addr);

Printing the device tree path would be more helpful than the address.

Regards,

-- 
Julien Grall