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Date: Thu, 20 Nov 2014 15:07:49 +0100
From: Alexander Graf <agraf@suse.de>
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Subject: Re: [Qemu-devel] [PATCH] target-ppc: Load/Store Vector Element
	Storage Alignment
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To: Tom Musta <tommusta@gmail.com>, qemu-devel@nongnu.org, qemu-ppc@nongnu.org



On 17.11.14 21:58, Tom Musta wrote:
> The Load Vector Element Indexed and Store Vector Element Indexed
> instructions compute an effective address in the usual manner.
> However, they truncate that address to the natural boundary.
> For example, the lvewx instruction will ignore the least significant
> two bits of the address and thus load the aligned word of storage.
> 
> Fix the generators for these instruction to properly perform this
> truncation.
> 
> Signed-off-by: Tom Musta <tommusta@gmail.com>

Thanks, applied to ppc-next-2.3


Alex