From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Boyd Subject: Re: [PATCH 6/7] clk: qcom: ipq: Add lpass clock controller driver Date: Thu, 20 Nov 2014 18:18:28 -0800 Message-ID: <546EA0F4.10006@codeaurora.org> References: <1416442245-21967-1-git-send-email-sboyd@codeaurora.org> <1416442245-21967-7-git-send-email-sboyd@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Return-path: Received: from smtp.codeaurora.org ([198.145.11.231]:36496 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756702AbaKUCSa (ORCPT ); Thu, 20 Nov 2014 21:18:30 -0500 In-Reply-To: <1416442245-21967-7-git-send-email-sboyd@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: Mike Turquette Cc: Rajendra Nayak , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Kenneth Westfield , Josh Cartwright , Kumar Gala On 11/19/2014 04:10 PM, Stephen Boyd wrote: > + > +static struct clk_regmap_div mi2s_bit_div_clk = { > + .reg = 0x48, > + .shift = 10, > + .width = 4, > + .clkr = { > + .enable_reg = 0x48, > + .enable_mask = BIT(15), This also has a halt bit so I'll add that in the next version by splitting this down further into a divider and a branch. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project From mboxrd@z Thu Jan 1 00:00:00 1970 From: sboyd@codeaurora.org (Stephen Boyd) Date: Thu, 20 Nov 2014 18:18:28 -0800 Subject: [PATCH 6/7] clk: qcom: ipq: Add lpass clock controller driver In-Reply-To: <1416442245-21967-7-git-send-email-sboyd@codeaurora.org> References: <1416442245-21967-1-git-send-email-sboyd@codeaurora.org> <1416442245-21967-7-git-send-email-sboyd@codeaurora.org> Message-ID: <546EA0F4.10006@codeaurora.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 11/19/2014 04:10 PM, Stephen Boyd wrote: > + > +static struct clk_regmap_div mi2s_bit_div_clk = { > + .reg = 0x48, > + .shift = 10, > + .width = 4, > + .clkr = { > + .enable_reg = 0x48, > + .enable_mask = BIT(15), This also has a halt bit so I'll add that in the next version by splitting this down further into a divider and a branch. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project