Re: [Qemu-devel] [RFC v2 4/4] hw/arm/virt: Add generic-pci device support

[Claudio Fontana <claudio.fontana@huawei.com>]

On 21.11.2014 19:07, Alvise Rigo wrote:
> Instantiate a generic-pci PCI controller to add a PCI bus to the
> mach-virt platform. The platform memory map has now three more memory
> ranges to map the device's memory regions (Configuration region, I/O
> region and Memory region). Now that a PCI bus is provided, the machine
> could be launched with multiple PCI devices through the -device option
> (e.g., -device virtio-blk-pci).
> 
> Signed-off-by: Alvise Rigo <a.rigo@virtualopensystems.com>
> ---
>  hw/arm/virt.c | 55 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 55 insertions(+)
> 
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 4e7b869..74e6838 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -32,6 +32,7 @@
>  #include "hw/arm/arm.h"
>  #include "hw/arm/primecell.h"
>  #include "hw/devices.h"
> +#include "hw/pci-host/generic-pci.h"
>  #include "net/net.h"
>  #include "sysemu/block-backend.h"
>  #include "sysemu/device_tree.h"
> @@ -44,6 +45,7 @@
>  #include "qemu/error-report.h"
>  
>  #define NUM_VIRTIO_TRANSPORTS 32
> +#define NUM_PCI_IRQS 20
>  
>  /* Number of external interrupt lines to configure the GIC with */
>  #define NUM_IRQS 128
> @@ -68,6 +70,9 @@ enum {
>      VIRT_UART,
>      VIRT_MMIO,
>      VIRT_RTC,
> +    VIRT_PCI_CFG,
> +    VIRT_PCI_IO,
> +    VIRT_PCI_MEM,
>  };
>  
>  typedef void (*modify_dtb_func)(void *fdt, DeviceState *dev);
> @@ -120,6 +125,9 @@ static const MemMapEntry a15memmap[] = {
>      [VIRT_MMIO] =       { 0x0a000000, 0x00000200 },
>      /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
>      /* 0x10000000 .. 0x40000000 reserved for PCI */
> +    [VIRT_PCI_CFG] =    { 0x10000000, 0x01000000 },
> +    [VIRT_PCI_IO] =     { 0x11000000, 0x00010000 },
> +    [VIRT_PCI_MEM] =    { 0x12000000, 0x2e000000 },
>      [VIRT_MEM] =        { 0x40000000, 30ULL * 1024 * 1024 * 1024 },
>  };
>  
> @@ -127,6 +135,7 @@ static const int a15irqmap[] = {
>      [VIRT_UART] = 1,
>      [VIRT_RTC] = 2,
>      [VIRT_MMIO] = 16, /* ...to 16 + NUM_VIRTIO_TRANSPORTS - 1 */
> +    [VIRT_PCI_CFG] = 47,

why not say
[VIRT_PCI_CFG] = 16 + NUM_VIRTIO_TRANSPORTS

instead of "47"?

By the way isn't 47 wrong anyway? From 16 to 47 it's virtio transports no?
Should it not be 48?

>  };
>  
>  static VirtBoardInfo machines[] = {
> @@ -550,6 +559,50 @@ static void create_flash(const VirtBoardInfo *vbi)
>      g_free(nodename);
>  }
>  
> +static void create_pci_host(const VirtBoardInfo *vbi, qemu_irq *pic)
> +{
> +    PCIBus *pci_bus;
> +    DeviceState *dev;
> +    SysBusDevice *busdev;
> +    PCIGenState *pgdev;
> +    GenericPCIPlatformData *pdata;
> +    int i;
> +    const MemMapEntry *mme = NULL;
> +
> +    dev = qdev_create(NULL, "generic_pci");
> +    busdev = SYS_BUS_DEVICE(dev);
> +    pgdev = PCI_GEN(dev);
> +
> +    mme = vbi->memmap;
> +
> +    /* Pass platform dependent data to the controller. */
> +    pdata = &pgdev->plat_data;
> +    pdata->addr_map[PCI_CFG].addr = mme[VIRT_PCI_CFG].base;
> +    pdata->addr_map[PCI_CFG].size = mme[VIRT_PCI_CFG].size;
> +    pdata->addr_map[PCI_IO].addr = mme[VIRT_PCI_IO].base;
> +    pdata->addr_map[PCI_IO].size = mme[VIRT_PCI_IO].size;
> +    pdata->addr_map[PCI_MEM].addr = mme[VIRT_PCI_MEM].base;
> +    pdata->addr_map[PCI_MEM].size = mme[VIRT_PCI_MEM].size;
> +    pdata->gic_node_name = "/intc";
> +    pdata->base_irq = vbi->irqmap[VIRT_PCI_CFG];
> +    pdata->irqs = NUM_PCI_IRQS;
> +    qdev_init_nofail(dev);
> +
> +    sysbus_mmio_map(busdev, 0, mme[VIRT_PCI_CFG].base); /* PCI config */
> +    sysbus_mmio_map(busdev, 1, mme[VIRT_PCI_IO].base);  /* PCI I/O */
> +    sysbus_mmio_map(busdev, 2, mme[VIRT_PCI_MEM].base); /* PCI memory window */
> +
> +    for ( i = 0; i < NUM_PCI_IRQS; i++) {
> +        sysbus_connect_irq(busdev, i, pic[vbi->irqmap[VIRT_PCI_CFG] + i]);
> +    }
> +
> +    pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
> +    pci_create_simple(pci_bus, -1, "pci-ohci");
> +    pci_create_simple(pci_bus, -1, "lsi53c895a");
> +
> +    add_dtb_modifier(pci_controller_build_dt_node, dev);
> +}
> +
>  static void *machvirt_dtb(const struct arm_boot_info *binfo, int *fdt_size)
>  {
>      const VirtBoardInfo *board = (const VirtBoardInfo *)binfo;
> @@ -658,6 +711,8 @@ static void machvirt_init(MachineState *machine)
>       */
>      create_virtio_devices(vbi, pic);
>  
> +    create_pci_host(vbi, pic);
> +
>      Notifier *finalize_dtb_notifier = g_new(Notifier, 1);
>      finalize_dtb_notifier->notify = machvirt_finalize_dt;
>      qemu_add_machine_init_done_notifier(finalize_dtb_notifier);
>