From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andy Yan Subject: Re: [PATCH v15 12/12] drm: bridge/dw_hdmi: add rockchip rk3288 support Date: Wed, 03 Dec 2014 20:32:15 +0800 Message-ID: <547F02CF.9010804@rock-chips.com> References: <1417505778-18341-1-git-send-email-andy.yan@rock-chips.com> <1417506327-18908-1-git-send-email-andy.yan@rock-chips.com> <1417515882.3411.8.camel@pengutronix.de> <547DB1ED.7000409@rock-chips.com> <1417525257.3411.12.camel@pengutronix.de> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1417525257.3411.12.camel@pengutronix.de> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: driverdev-devel-bounces@linuxdriverproject.org Sender: "devel" To: Philipp Zabel Cc: Mark Rutland , heiko@sntech.de, airlied@linux.ie, dri-devel@lists.freedesktop.org, ykk@rock-chips.com, devel@driverdev.osuosl.org, Pawel Moll , linux-rockchip@lists.infradead.org, Grant Likely , Dave Airlie , jay.xu@rock-chips.com, devicetree@vger.kernel.org, Zubair.Kakakhel@imgtec.com, Arnd Bergmann , Ian Campbell , Inki Dae , Rob Herring , Sean Paul , rmk+kernel@arm.linux.org.uk, mark.yao@rock-chips.com, fabio.estevam@freescale.com, Josh Boyer , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, djkurtz@google.com, Kumar Gala , Shawn Guo , vladimir_zapolskiy@mentor.com List-Id: devicetree@vger.kernel.org SGkgUGhpbGlwcDoKT24gMjAxNOW5tDEy5pyIMDLml6UgMjE6MDAsIFBoaWxpcHAgWmFiZWwgd3Jv dGU6Cj4gSGkgQW5keSwKPgo+IEFtIERpZW5zdGFnLCBkZW4gMDIuMTIuMjAxNCwgMjA6MzQgKzA4 MDAgc2NocmllYiBBbmR5IFlhbjoKPj4gSGkgUGhpbGlwcDoKPj4gT24gMjAxNOW5tDEy5pyIMDLm l6UgMTg6MjQsIFBoaWxpcHAgWmFiZWwgd3JvdGU6Cj4+PiBIaSBBbmR5LAo+Pj4KPj4+IEFtIERp ZW5zdGFnLCBkZW4gMDIuMTIuMjAxNCwgMTU6NDUgKzA4MDAgc2NocmllYiBBbmR5IFlhbjoKPj4+ IFsuLi5dCj4+Pj4gK3N0YXRpYyBpbnQgZHdfaGRtaV9yb2NrY2hpcF9iaW5kKHN0cnVjdCBkZXZp Y2UgKmRldiwgc3RydWN0IGRldmljZSAqbWFzdGVyLAo+Pj4+ICsJCQkJIHZvaWQgKmRhdGEpCj4+ Pj4gK3sKPj4+PiArCXN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYgPSB0b19wbGF0Zm9ybV9k ZXZpY2UoZGV2KTsKPj4+PiArCWNvbnN0IHN0cnVjdCBkd19oZG1pX3BsYXRfZGF0YSAqcGxhdF9k YXRhOwo+Pj4+ICsJY29uc3Qgc3RydWN0IG9mX2RldmljZV9pZCAqbWF0Y2g7Cj4+Pj4gKwlzdHJ1 Y3QgZHJtX2RldmljZSAqZHJtID0gZGF0YTsKPj4+PiArCXN0cnVjdCBkcm1fZW5jb2RlciAqZW5j b2RlcjsKPj4+PiArCXN0cnVjdCByb2NrY2hpcF9oZG1pICpoZG1pOwo+Pj4+ICsJaW50IHJldDsK Pj4+PiArCj4+Pj4gKwlpZiAoIXBkZXYtPmRldi5vZl9ub2RlKQo+Pj4+ICsJCXJldHVybiAtRU5P REVWOwo+Pj4+ICsKPj4+PiArCWhkbWkgPSBkZXZtX2t6YWxsb2MoJnBkZXYtPmRldiwgc2l6ZW9m KCpoZG1pKSwgR0ZQX0tFUk5FTCk7Cj4+Pj4gKwlpZiAoIWhkbWkpCj4+Pj4gKwkJcmV0dXJuIC1F Tk9NRU07Cj4+Pj4gKwo+Pj4+ICsJbWF0Y2ggPSBvZl9tYXRjaF9ub2RlKGR3X2hkbWlfcm9ja2No aXBfaWRzLCBwZGV2LT5kZXYub2Zfbm9kZSk7Cj4+Pj4gKwlwbGF0X2RhdGEgPSBtYXRjaC0+ZGF0 YTsKPj4+PiArCWhkbWktPmRldiA9ICZwZGV2LT5kZXY7Cj4+Pj4gKwllbmNvZGVyID0gJmhkbWkt PmVuY29kZXI7Cj4+Pj4gKwlwbGF0Zm9ybV9zZXRfZHJ2ZGF0YShwZGV2LCBoZG1pKTsKPj4+PiAr Cj4+Pj4gKwlyZXQgPSByb2NrY2hpcF9oZG1pX3BhcnNlX2R0KGhkbWkpOwo+Pj4+ICsJaWYgKHJl dCkgewo+Pj4+ICsJCWRldl9lcnIoaGRtaS0+ZGV2LCAiVW5hYmxlIHRvIHBhcnNlIE9GIGRhdGFc biIpOwo+Pj4+ICsJCXJldHVybiByZXQ7Cj4+Pj4gKwl9Cj4+Pj4gKwo+Pj4+ICsJcmV0ID0gY2xr X3ByZXBhcmVfZW5hYmxlKGhkbWktPmNsayk7Cj4+Pj4gKwlpZiAocmV0KSB7Cj4+Pj4gKwkJZGV2 X2VycihoZG1pLT5kZXYsICJDYW5ub3QgZW5hYmxlIEhETUkgY2xvY2s6ICVkXG4iLCByZXQpOwo+ Pj4+ICsJCXJldHVybiByZXQ7Cj4+Pj4gKwl9Cj4+Pj4gKwo+Pj4+ICsJcmV0ID0gY2xrX3ByZXBh cmVfZW5hYmxlKGhkbWktPmhkY3BfY2xrKTsKPj4+PiArCWlmIChyZXQpIHsKPj4+PiArCQlkZXZf ZXJyKGhkbWktPmRldiwgIkNhbm5vdCBlbmFibGUgSERNSSBoZGNwIGNsb2NrOiAlZFxuIiwgcmV0 KTsKPj4+PiArCQlyZXR1cm4gcmV0Owo+Pj4+ICsJfQo+Pj4gQ291bGQgd2UgaGF2ZSBhIGxvb2sg YXQgdGhlIGNsb2NrcyBhZ2Fpbj8gQmFzaWNhbGx5IHRoZSBSb2NrY2hpcCBjbG9jawo+Pj4gaGFu ZGxpbmcgaXMgZXhhY3RseSB0aGUgc2FtZSwgZXhjZXB0IHRoZSBjbG9ja3MgYXJlIGNhbGxlZCBi eSBvdGhlcgo+Pj4gbmFtZXMuCj4+Pgo+Pj4gT24gaS5NWDYsIGFjY29yZGluZyB0byB0aGUgcmVm ZXJlbmNlIG1hbnVhbCwgdGhlIEhETUkgVFggbW9kdWxlIGhhcyBmb3VyCj4+PiBjbG9jayBpbnB1 dHM6ICJpYWhiY2xrIiAoYnVzIGNsb2NrKSwgImljZWNjbGsiICgzMiBrSHogQ0VDIGNsb2NrKSwK Pj4+ICJpaGNsayIgKG1vZHVsZSBjbG9jayksIGFuZCAiaXNmcmNsayIgKDI3IE1IeiBpbnRlcm5h bCBTRlIgY2xvY2spLgo+Pj4gVGhlICJpYWhiY2xrIiBhbmQgImloY2xrIiBhcmUgYm90aCBzb3Vy Y2VkIGZyb20gdGhlIFNvQyBBSEIgcm9vdCBjbG9jaywKPj4+IHRoZSAzMiBrSHogcmVmZXJlbmNl IGlucHV0IGNhbid0IGJlIGdhdGVkLCBhbmQgdGhlICJpc2ZyY2xrIiBoYXMgaXRzIG93bgo+Pj4g Z2F0ZS4KPj4+Cj4+PiBEb2VzIHRoZSBIRE1JIFRYIGltcGxlbWVudGF0aW9uIG9uIFJvY2tjaGlw IHN0aWxsIGhhdmUgdGhlIHNlcGFyYXRlCj4+PiBleHRlcm5hbCBzZnIgYnVzIGFuZCBtb2R1bGUg Y2xvY2sgaW5wdXRzPyBJIGFzc3VtZSB0aGF0IHlvdXIgImNsayIgaW5wdXQKPj4+IGlzIGEgc2lu Z2xlIGdhdGUgYml0IGZvciBidXMgYW5kIG1vZHVsZSBjbG9ja3MgYXQgdGhlIHNhbWUgdGltZT8K Pj4+IElmIHBvc3NpYmxlLCBJJ2QgcHJlZmVyIHRvIGZpbmQgYSBjb21tb24gYmluZGluZyBmb3Ig dGhlIGNsb2NrcyB3aXRoCj4+PiBzb21lIG9mIHRoZSBjbG9ja3MgYmVpbmcgb3B0aW9uYWwsIGJ1 dCBmb3IgdGhhdCB3ZSBuZWVkIHRvIGtub3cgdGhlCj4+PiBhY3R1YWwgY2xvY2sgaW5wdXRzIHRv IHRoZSBIRE1JIFRYIG1vZHVsZS4KPj4+Cj4+PiByZWdhcmRzCj4+PiBQaGlsaXBwCj4+Pgo+PiAg ICAgICBUaGVyZSBhcmUgdGhyZWUgIGluZGl2aWR1YWwgY2xvY2sgaW5wdXRzIG9uIFJvY2tjaGlw IFJLMzI4OCBIRE1JOgo+PiAiaGRtaV9jdHJsX2NsayIsCj4+ICAgICAgICJoZG1pX2NlY19jbGsi LCAiaGRtaV9oZGNwX2NsayIsIHRoZSB0aHJlZSBjbG9ja3MgYXJlIHJlc3BvbnNpYmxlCj4+IGZv ciBkaWZmZXJlbnQKPj4gICAgICAgIGZ1bmN0aW9ucyBhcyB0aGVpciBuYW1lIGRlc2NyaWJlZCwg YW5kIGhhdmUgdGhlaXIgb3duIHByaXZhdGUgZ2F0ZQo+PiBiaXQuIFRoYXQgaXMKPj4gICAgICAg IHRvIHNheSwgdGhlIGNlY19jbGsgYW5kIGhkY3BfY2xrIGNhbiBhbGwgYmUgZGlzYWJsZWQgaWYg d2UgZG9uJ3QKPj4gbmVlZCBoZGNwIGFuZCBjZWMKPj4gICAgICAgIGZ1bmN0aW9uLgo+PiAgICAg ICAgU28gSSB0aGluayBpdCdzIGJldHRlciB0byBtYWtlIHRoZSBjbGsgY29udHJvbCBwbGF0Zm9y bSBpbmRlcGVuZGVudC4KPiBNeSBxdWVzdGlvbiBpcyBub3QgYWJvdXQgdGhlIGF2YWlsYWJsZSBn YXRlcyBhdCB0aGUgU29DIGxldmVsLCBidXQgYWJvdXQKPiB0aGUgYWN0dWFsIGNsb2NrIGlucHV0 cyBmcm9tIHBvaW50IG9mIHZpZXcgb2YgdGhlIEhETUkgVFggSVAuCj4KPiBJdCBjb3VsZCBiZSB0 aGF0IHRoZSBoZG1pX2N0cmxfY2xrIGdhdGVzIGFsbCBpbnB1dHMgdG8gdGhlIG1vZHVsZSBhbmQK PiBidXMgY2xvY2tzIHRvZ2V0aGVyLiBJZiBzbywgeW91IGNvdWxkIGp1c3QgcmV1c2UgImlzZnIi IGFuZCAiaWFoYiIgYW5kCj4gc2V0IGl0IHRvIHRoZSBzYW1lIGNsb2NrLiBJZiBub3QsIHdlJ2Qg bmVlZCB0byB0aGluayBvZiBzb21ldGhpbmcgZWxzZS4KPiBVbmZvcnR1bmF0ZWx5IEkgZG9uJ3Qg aGF2ZSBhbnkgU3lub3BzeXMgZG9jdW1lbnRhdGlvbiBvZiB0aGUgSERNSSBUWCBhdAo+IHRoYXQg bGV2ZWwuCgogICAgQWZ0ZXIgY29uZmlybWluZyB3aXRoIHRoZSBJQyBkZXNpZ25lciwgd2UgZmlu YWxseSBtYWtlIGNsZWFyIHRoYXQKICAgIFJvY2tjaGlwIFJLMzI4OCBhbG1vc3QgdXNlIHRoZSBz YW1lIGNsb2NrIGRlc2lnbiB3aXRoIGlteDoKICAgIGNsay0tLS0taWFoYmNsaywgdXNlZCBmb3Ig aGRtaSBtb2R1bGUgYW5kIGJ1cwogICAgaGRjcF9jbGstLS0tLWlzZnJjbGssIHVzZWQgZm9yIGhk Y3AgYW5kIGkyY20KICAgIGNlY2NsayAtLS0tLWNlY2NsaywgYnV0IHRoaXMgY2xrIGNhbiBiZSBn YXRlZCBvbiByb2NrY2hpcCwgdGhpcyBpcyAKZGlmZmVyZW50IHdpdGggaW14LAogICAgYnV0IHdl IGRvbid0IGhhbmRsZSB0aGUgY2VjIHN0dWZmIG5vdy4gU28gaSB3aWxsIHRyeSB0byByZXVzZSB0 aGUgCmlteCBjbGsgYmluZHMuIGRvIHlvdQogICB0aGluayB0aGF0IGlzIG9rPwo+IHJlZ2FyZHMK PiBQaGlsaXBwCj4KPgo+Cj4KCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fXwpkZXZlbCBtYWlsaW5nIGxpc3QKZGV2ZWxAbGludXhkcml2ZXJwcm9qZWN0Lm9y ZwpodHRwOi8vZHJpdmVyZGV2LmxpbnV4ZHJpdmVycHJvamVjdC5vcmcvbWFpbG1hbi9saXN0aW5m by9kcml2ZXJkZXYtZGV2ZWwK From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752530AbaLCMcb (ORCPT ); Wed, 3 Dec 2014 07:32:31 -0500 Received: from lucky1.263xmail.com ([211.157.147.130]:32772 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752200AbaLCMc2 (ORCPT ); Wed, 3 Dec 2014 07:32:28 -0500 X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: andy.yan@rock-chips.com X-FST-TO: galak@codeaurora.org X-SENDER-IP: 121.15.173.1 X-LOGIN-NAME: andy.yan@rock-chips.com X-UNIQUE-TAG: <9ab3d8e6692d0251516df7d70c7beacd> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Message-ID: <547F02CF.9010804@rock-chips.com> Date: Wed, 03 Dec 2014 20:32:15 +0800 From: Andy Yan User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.0 MIME-Version: 1.0 To: Philipp Zabel CC: airlied@linux.ie, heiko@sntech.de, fabio.estevam@freescale.com, rmk+kernel@arm.linux.org.uk, Greg Kroah-Hartman , Grant Likely , Rob Herring , Shawn Guo , Josh Boyer , Sean Paul , Inki Dae , Dave Airlie , Arnd Bergmann , Lucas Stach , Zubair.Kakakhel@imgtec.com, djkurtz@google.com, ykk@rock-chips.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devel@driverdev.osuosl.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, jay.xu@rock-chips.com, Pawel Moll , mark.yao@rock-chips.com, Mark Rutland , vladimir_zapolskiy@mentor.com, Ian Campbell , Kumar Gala Subject: Re: [PATCH v15 12/12] drm: bridge/dw_hdmi: add rockchip rk3288 support References: <1417505778-18341-1-git-send-email-andy.yan@rock-chips.com> <1417506327-18908-1-git-send-email-andy.yan@rock-chips.com> <1417515882.3411.8.camel@pengutronix.de> <547DB1ED.7000409@rock-chips.com> <1417525257.3411.12.camel@pengutronix.de> In-Reply-To: <1417525257.3411.12.camel@pengutronix.de> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Philipp: On 2014年12月02日 21:00, Philipp Zabel wrote: > Hi Andy, > > Am Dienstag, den 02.12.2014, 20:34 +0800 schrieb Andy Yan: >> Hi Philipp: >> On 2014年12月02日 18:24, Philipp Zabel wrote: >>> Hi Andy, >>> >>> Am Dienstag, den 02.12.2014, 15:45 +0800 schrieb Andy Yan: >>> [...] >>>> +static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, >>>> + void *data) >>>> +{ >>>> + struct platform_device *pdev = to_platform_device(dev); >>>> + const struct dw_hdmi_plat_data *plat_data; >>>> + const struct of_device_id *match; >>>> + struct drm_device *drm = data; >>>> + struct drm_encoder *encoder; >>>> + struct rockchip_hdmi *hdmi; >>>> + int ret; >>>> + >>>> + if (!pdev->dev.of_node) >>>> + return -ENODEV; >>>> + >>>> + hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); >>>> + if (!hdmi) >>>> + return -ENOMEM; >>>> + >>>> + match = of_match_node(dw_hdmi_rockchip_ids, pdev->dev.of_node); >>>> + plat_data = match->data; >>>> + hdmi->dev = &pdev->dev; >>>> + encoder = &hdmi->encoder; >>>> + platform_set_drvdata(pdev, hdmi); >>>> + >>>> + ret = rockchip_hdmi_parse_dt(hdmi); >>>> + if (ret) { >>>> + dev_err(hdmi->dev, "Unable to parse OF data\n"); >>>> + return ret; >>>> + } >>>> + >>>> + ret = clk_prepare_enable(hdmi->clk); >>>> + if (ret) { >>>> + dev_err(hdmi->dev, "Cannot enable HDMI clock: %d\n", ret); >>>> + return ret; >>>> + } >>>> + >>>> + ret = clk_prepare_enable(hdmi->hdcp_clk); >>>> + if (ret) { >>>> + dev_err(hdmi->dev, "Cannot enable HDMI hdcp clock: %d\n", ret); >>>> + return ret; >>>> + } >>> Could we have a look at the clocks again? Basically the Rockchip clock >>> handling is exactly the same, except the clocks are called by other >>> names. >>> >>> On i.MX6, according to the reference manual, the HDMI TX module has four >>> clock inputs: "iahbclk" (bus clock), "icecclk" (32 kHz CEC clock), >>> "ihclk" (module clock), and "isfrclk" (27 MHz internal SFR clock). >>> The "iahbclk" and "ihclk" are both sourced from the SoC AHB root clock, >>> the 32 kHz reference input can't be gated, and the "isfrclk" has its own >>> gate. >>> >>> Does the HDMI TX implementation on Rockchip still have the separate >>> external sfr bus and module clock inputs? I assume that your "clk" input >>> is a single gate bit for bus and module clocks at the same time? >>> If possible, I'd prefer to find a common binding for the clocks with >>> some of the clocks being optional, but for that we need to know the >>> actual clock inputs to the HDMI TX module. >>> >>> regards >>> Philipp >>> >> There are three individual clock inputs on Rockchip RK3288 HDMI: >> "hdmi_ctrl_clk", >> "hdmi_cec_clk", "hdmi_hdcp_clk", the three clocks are responsible >> for different >> functions as their name described, and have their own private gate >> bit. That is >> to say, the cec_clk and hdcp_clk can all be disabled if we don't >> need hdcp and cec >> function. >> So I think it's better to make the clk control platform independent. > My question is not about the available gates at the SoC level, but about > the actual clock inputs from point of view of the HDMI TX IP. > > It could be that the hdmi_ctrl_clk gates all inputs to the module and > bus clocks together. If so, you could just reuse "isfr" and "iahb" and > set it to the same clock. If not, we'd need to think of something else. > Unfortunately I don't have any Synopsys documentation of the HDMI TX at > that level. After confirming with the IC designer, we finally make clear that Rockchip RK3288 almost use the same clock design with imx: clk-----iahbclk, used for hdmi module and bus hdcp_clk-----isfrclk, used for hdcp and i2cm cecclk -----cecclk, but this clk can be gated on rockchip, this is different with imx, but we don't handle the cec stuff now. So i will try to reuse the imx clk binds. do you think that is ok? > regards > Philipp > > > >