* [PATCH net-next 0/2] net: support for new GPHY revision scheme @ 2014-12-02 23:28 Florian Fainelli 2014-12-02 23:28 ` [PATCH net-next 1/2] net: bcmgenet: add support for new GENET PHY " Florian Fainelli 2014-12-02 23:28 ` [PATCH net-next 2/2] net: phy: bcm7xxx: add an explicit version check for GPHY rev G0 Florian Fainelli 0 siblings, 2 replies; 6+ messages in thread From: Florian Fainelli @ 2014-12-02 23:28 UTC (permalink / raw) To: netdev; +Cc: davem, Florian Fainelli Hi David, These two patches update the GENET GPHY revision logic to account for some of our newer designs starting with GPHY rev G0. Thanks! Florian Fainelli (2): net: bcmgenet: add support for new GENET PHY revision scheme net: phy: bcm7xxx: add an explicit version check for GPHY rev G0 drivers/net/ethernet/broadcom/genet/bcmgenet.c | 24 +++++++++++++++++++++++- drivers/net/phy/bcm7xxx.c | 2 ++ 2 files changed, 25 insertions(+), 1 deletion(-) -- 2.1.0 ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH net-next 1/2] net: bcmgenet: add support for new GENET PHY revision scheme 2014-12-02 23:28 [PATCH net-next 0/2] net: support for new GPHY revision scheme Florian Fainelli @ 2014-12-02 23:28 ` Florian Fainelli 2014-12-03 11:23 ` Sergei Shtylyov 2014-12-02 23:28 ` [PATCH net-next 2/2] net: phy: bcm7xxx: add an explicit version check for GPHY rev G0 Florian Fainelli 1 sibling, 1 reply; 6+ messages in thread From: Florian Fainelli @ 2014-12-02 23:28 UTC (permalink / raw) To: netdev; +Cc: davem, Florian Fainelli Starting with GPHY revision G0, the GENET register layout has changed to use the same numbering scheme as the Starfighter 2 switch. This means that GPHY major revision is in bits 15:12, minor in bits 11:8 and patch level is in bits 7:4. Introduce a small heuristic which checks for the old scheme first, tests for the new scheme and finally attempts to catch reserved values and aborts. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> --- drivers/net/ethernet/broadcom/genet/bcmgenet.c | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.c b/drivers/net/ethernet/broadcom/genet/bcmgenet.c index f2fadb053d52..23e283174c4e 100644 --- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c +++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c @@ -2503,6 +2503,7 @@ static void bcmgenet_set_hw_params(struct bcmgenet_priv *priv) struct bcmgenet_hw_params *params; u32 reg; u8 major; + u16 gphy_rev; if (GENET_IS_V4(priv)) { bcmgenet_dma_regs = bcmgenet_dma_regs_v3plus; @@ -2551,8 +2552,29 @@ static void bcmgenet_set_hw_params(struct bcmgenet_priv *priv) * to pass this information to the PHY driver. The PHY driver expects * to find the PHY major revision in bits 15:8 while the GENET register * stores that information in bits 7:0, account for that. + * + * On newer chips, starting with PHY revision G0, a new scheme is + * deployed similar to the Starfighter 2 switch with GPHY major + * revision in bits 15:8 and patch level in bits 7:0. Major revision 0 + * is reserved as well as special value 0x01ff, we have a small + * heuristic to check for the new GPHY revision and re-arrange things + * so the GPHY driver is happy. */ - priv->gphy_rev = (reg & 0xffff) << 8; + gphy_rev = (reg & 0xffff); + + /* This the good old scheme, just GPHY major, no minor nor patch */ + if ((gphy_rev & 0xf0) != 0) + priv->gphy_rev = gphy_rev << 8; + + /* This is the new scheme, GPHY major rolls over with 0x10 = rev G0 */ + else if ((gphy_rev & 0xff00) != 0) + priv->gphy_rev = gphy_rev; + + /* This is reserved so should require special treatment */ + else if (gphy_rev == 0 || gphy_rev == 0x01ff) { + pr_warn("Invalid GPHY revision detected: 0x%04x\n", gphy_rev); + return; + } #ifdef CONFIG_PHYS_ADDR_T_64BIT if (!(params->flags & GENET_HAS_40BITS)) -- 2.1.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH net-next 1/2] net: bcmgenet: add support for new GENET PHY revision scheme 2014-12-02 23:28 ` [PATCH net-next 1/2] net: bcmgenet: add support for new GENET PHY " Florian Fainelli @ 2014-12-03 11:23 ` Sergei Shtylyov 2014-12-03 17:54 ` Florian Fainelli 0 siblings, 1 reply; 6+ messages in thread From: Sergei Shtylyov @ 2014-12-03 11:23 UTC (permalink / raw) To: Florian Fainelli, netdev; +Cc: davem Hello. On 12/3/2014 2:28 AM, Florian Fainelli wrote: > Starting with GPHY revision G0, the GENET register layout has changed to > use the same numbering scheme as the Starfighter 2 switch. This means > that GPHY major revision is in bits 15:12, minor in bits 11:8 and patch > level is in bits 7:4. > Introduce a small heuristic which checks for the old scheme first, tests > for the new scheme and finally attempts to catch reserved values and > aborts. > Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> > --- > drivers/net/ethernet/broadcom/genet/bcmgenet.c | 24 +++++++++++++++++++++++- > 1 file changed, 23 insertions(+), 1 deletion(-) > diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.c b/drivers/net/ethernet/broadcom/genet/bcmgenet.c > index f2fadb053d52..23e283174c4e 100644 > --- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c > +++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c [...] > @@ -2551,8 +2552,29 @@ static void bcmgenet_set_hw_params(struct bcmgenet_priv *priv) > * to pass this information to the PHY driver. The PHY driver expects > * to find the PHY major revision in bits 15:8 while the GENET register > * stores that information in bits 7:0, account for that. > + * > + * On newer chips, starting with PHY revision G0, a new scheme is > + * deployed similar to the Starfighter 2 switch with GPHY major > + * revision in bits 15:8 and patch level in bits 7:0. Major revision 0 > + * is reserved as well as special value 0x01ff, we have a small > + * heuristic to check for the new GPHY revision and re-arrange things > + * so the GPHY driver is happy. > */ > - priv->gphy_rev = (reg & 0xffff) << 8; > + gphy_rev = (reg & 0xffff); Parens not needed anymore. > + > + /* This the good old scheme, just GPHY major, no minor nor patch */ Missing "is" after "This"? > + if ((gphy_rev & 0xf0) != 0) > + priv->gphy_rev = gphy_rev << 8; > + > + /* This is the new scheme, GPHY major rolls over with 0x10 = rev G0 */ > + else if ((gphy_rev & 0xff00) != 0) > + priv->gphy_rev = gphy_rev; > + > + /* This is reserved so should require special treatment */ > + else if (gphy_rev == 0 || gphy_rev == 0x01ff) { > + pr_warn("Invalid GPHY revision detected: 0x%04x\n", gphy_rev); > + return; > + } Hm, {} are needed on all *if* branches. [...] WBR, Sergei ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH net-next 1/2] net: bcmgenet: add support for new GENET PHY revision scheme 2014-12-03 11:23 ` Sergei Shtylyov @ 2014-12-03 17:54 ` Florian Fainelli 2014-12-03 18:12 ` Sergei Shtylyov 0 siblings, 1 reply; 6+ messages in thread From: Florian Fainelli @ 2014-12-03 17:54 UTC (permalink / raw) To: Sergei Shtylyov, netdev; +Cc: davem On 03/12/14 03:23, Sergei Shtylyov wrote: > Hello. > > On 12/3/2014 2:28 AM, Florian Fainelli wrote: > >> Starting with GPHY revision G0, the GENET register layout has changed to >> use the same numbering scheme as the Starfighter 2 switch. This means >> that GPHY major revision is in bits 15:12, minor in bits 11:8 and patch >> level is in bits 7:4. > >> Introduce a small heuristic which checks for the old scheme first, tests >> for the new scheme and finally attempts to catch reserved values and >> aborts. > >> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> >> --- >> drivers/net/ethernet/broadcom/genet/bcmgenet.c | 24 >> +++++++++++++++++++++++- >> 1 file changed, 23 insertions(+), 1 deletion(-) > >> diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.c >> b/drivers/net/ethernet/broadcom/genet/bcmgenet.c >> index f2fadb053d52..23e283174c4e 100644 >> --- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c >> +++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c > [...] >> @@ -2551,8 +2552,29 @@ static void bcmgenet_set_hw_params(struct >> bcmgenet_priv *priv) >> * to pass this information to the PHY driver. The PHY driver >> expects >> * to find the PHY major revision in bits 15:8 while the GENET >> register >> * stores that information in bits 7:0, account for that. >> + * >> + * On newer chips, starting with PHY revision G0, a new scheme is >> + * deployed similar to the Starfighter 2 switch with GPHY major >> + * revision in bits 15:8 and patch level in bits 7:0. Major >> revision 0 >> + * is reserved as well as special value 0x01ff, we have a small >> + * heuristic to check for the new GPHY revision and re-arrange >> things >> + * so the GPHY driver is happy. >> */ >> - priv->gphy_rev = (reg & 0xffff) << 8; >> + gphy_rev = (reg & 0xffff); > > Parens not needed anymore. > >> + >> + /* This the good old scheme, just GPHY major, no minor nor patch */ > > Missing "is" after "This"? Alright, I will resubmit... > >> + if ((gphy_rev & 0xf0) != 0) >> + priv->gphy_rev = gphy_rev << 8; >> + >> + /* This is the new scheme, GPHY major rolls over with 0x10 = rev >> G0 */ >> + else if ((gphy_rev & 0xff00) != 0) >> + priv->gphy_rev = gphy_rev; >> + >> + /* This is reserved so should require special treatment */ >> + else if (gphy_rev == 0 || gphy_rev == 0x01ff) { >> + pr_warn("Invalid GPHY revision detected: 0x%04x\n", gphy_rev); >> + return; >> + } > > Hm, {} are needed on all *if* branches. checkpatch.pl did not complain about that. > > [...] > > WBR, Sergei > ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH net-next 1/2] net: bcmgenet: add support for new GENET PHY revision scheme 2014-12-03 17:54 ` Florian Fainelli @ 2014-12-03 18:12 ` Sergei Shtylyov 0 siblings, 0 replies; 6+ messages in thread From: Sergei Shtylyov @ 2014-12-03 18:12 UTC (permalink / raw) To: Florian Fainelli, netdev; +Cc: davem Hello. On 12/03/2014 08:54 PM, Florian Fainelli wrote: >>> Starting with GPHY revision G0, the GENET register layout has changed to >>> use the same numbering scheme as the Starfighter 2 switch. This means >>> that GPHY major revision is in bits 15:12, minor in bits 11:8 and patch >>> level is in bits 7:4. >>> Introduce a small heuristic which checks for the old scheme first, tests >>> for the new scheme and finally attempts to catch reserved values and >>> aborts. >>> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> >>> --- >>> drivers/net/ethernet/broadcom/genet/bcmgenet.c | 24 >>> +++++++++++++++++++++++- >>> 1 file changed, 23 insertions(+), 1 deletion(-) >>> diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.c >>> b/drivers/net/ethernet/broadcom/genet/bcmgenet.c >>> index f2fadb053d52..23e283174c4e 100644 >>> --- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c >>> +++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c >> [...] >>> @@ -2551,8 +2552,29 @@ static void bcmgenet_set_hw_params(struct [...] >>> + if ((gphy_rev & 0xf0) != 0) >>> + priv->gphy_rev = gphy_rev << 8; >>> + >>> + /* This is the new scheme, GPHY major rolls over with 0x10 = rev >>> G0 */ >>> + else if ((gphy_rev & 0xff00) != 0) >>> + priv->gphy_rev = gphy_rev; >>> + >>> + /* This is reserved so should require special treatment */ >>> + else if (gphy_rev == 0 || gphy_rev == 0x01ff) { >>> + pr_warn("Invalid GPHY revision detected: 0x%04x\n", gphy_rev); >>> + return; >>> + } >> >> Hm, {} are needed on all *if* branches. > checkpatch.pl did not complain about that. It probably still doesn't. Nevertheless, refer to Documentation/CodingStyle, chapter 3. >> [...] WBR, Sergei ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH net-next 2/2] net: phy: bcm7xxx: add an explicit version check for GPHY rev G0 2014-12-02 23:28 [PATCH net-next 0/2] net: support for new GPHY revision scheme Florian Fainelli 2014-12-02 23:28 ` [PATCH net-next 1/2] net: bcmgenet: add support for new GENET PHY " Florian Fainelli @ 2014-12-02 23:28 ` Florian Fainelli 1 sibling, 0 replies; 6+ messages in thread From: Florian Fainelli @ 2014-12-02 23:28 UTC (permalink / raw) To: netdev; +Cc: davem, Florian Fainelli GPHY revision G0 has its version rolled over to 0x10, introduce an explicit check for that revision and invoke the proper workaround function for it. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> --- drivers/net/phy/bcm7xxx.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c index 7a53af4346e4..974ec4515269 100644 --- a/drivers/net/phy/bcm7xxx.c +++ b/drivers/net/phy/bcm7xxx.c @@ -252,6 +252,8 @@ static int bcm7xxx_28nm_config_init(struct phy_device *phydev) break; case 0xe0: case 0xf0: + /* Rev G0 introduces a roll over */ + case 0x10: ret = bcm7xxx_28nm_e0_plus_afe_config_init(phydev); break; default: -- 2.1.0 ^ permalink raw reply related [flat|nested] 6+ messages in thread
end of thread, other threads:[~2014-12-03 18:12 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2014-12-02 23:28 [PATCH net-next 0/2] net: support for new GPHY revision scheme Florian Fainelli 2014-12-02 23:28 ` [PATCH net-next 1/2] net: bcmgenet: add support for new GENET PHY " Florian Fainelli 2014-12-03 11:23 ` Sergei Shtylyov 2014-12-03 17:54 ` Florian Fainelli 2014-12-03 18:12 ` Sergei Shtylyov 2014-12-02 23:28 ` [PATCH net-next 2/2] net: phy: bcm7xxx: add an explicit version check for GPHY rev G0 Florian Fainelli
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