From mboxrd@z Thu Jan  1 00:00:00 1970
From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Subject: Re: [PATCH v15 17/21] x86/VPMU: Handle PMU interrupts
	for PV guests
Date: Wed, 03 Dec 2014 15:29:02 -0500
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To: Jan Beulich <JBeulich@suse.com>
Cc: kevin.tian@intel.com, keir@xen.org, suravee.suthikulpanit@amd.com, andrew.cooper3@citrix.com, tim@xen.org, dietmar.hahn@ts.fujitsu.com, xen-devel@lists.xen.org, Aravind.Gopalakrishnan@amd.com, jun.nakajima@intel.com, dgdegra@tycho.nsa.gov
List-Id: xen-devel@lists.xenproject.org

On 11/27/2014 03:59 AM, Jan Beulich wrote:
>>>> On 26.11.14 at 15:39, <boris.ostrovsky@oracle.com> wrote:
>> On 11/25/2014 09:28 AM, Jan Beulich wrote:
>>>> +            else
>>>> +            {
>>>> +                struct segment_register seg;
>>>> +
>>>> +                hvm_get_segment_register(sampled, x86_seg_cs, &seg);
>>>> +                r->cs = seg.sel;
>>>> +                hvm_get_segment_register(sampled, x86_seg_ss, &seg);
>>>> +                r->ss = seg.sel;
>>>> +                if ( seg.attr.fields.dpl != 0 )
>>>> +                    *flags |= PMU_SAMPLE_USER;
>>> Is that how hardware treats it (CPL != 0 meaning user, rather
>>> than CPL == 3)?
>> You mean how *software* (e.g. Linux kernel) treats it? If yes, then for
>> 32-bit user_mode() checks for (CS == 3) and for 64-bit it's !!(CS & 3).
> No, I meant hardware. There CPL qualified PMU aspects, and it was
> those I had in mind to use as reference here.
>
>>> Maybe you should surface CPL instead of a
>>> boolean flag?


Yes, I think it may be better. Let the caller sort out how to interpret it.

-boris


>> Am I not already doing it by passing SS and CS to the guest?
> No, neither SS.RPL nor CS.RPL formally represent CPL.
>
> Jan
>