From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH] have architectures specify the number of PIRQs a hardware domain gets Date: Fri, 05 Dec 2014 14:36:59 +0000 Message-ID: <5481C30B.3020901@linaro.org> References: <5481C67D020000780004D2D1@mail.emea.novell.com> <1417789634.22808.66.camel@eu.citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Xwu0I-0005sc-1k for xen-devel@lists.xenproject.org; Fri, 05 Dec 2014 14:37:06 +0000 Received: by mail-wi0-f181.google.com with SMTP id r20so1596571wiv.8 for ; Fri, 05 Dec 2014 06:37:04 -0800 (PST) In-Reply-To: <1417789634.22808.66.camel@eu.citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian Campbell , Jan Beulich Cc: Keir Fraser , Stefano Stabellini , Andrew Cooper , Tim Deegan , David Vrabel , xen-devel , Ian Jackson List-Id: xen-devel@lists.xenproject.org Hi, On 05/12/14 14:27, Ian Campbell wrote: > On Fri, 2014-12-05 at 13:51 +0000, Jan Beulich wrote: >> #define nr_static_irqs NR_IRQS >> +#define arch_hwdom_irqs(domid) NR_IRQS > > FWIW gic_number_lines() is the ARM equivalent of getting the number of > GSIs. > > *BUT* we don't actually use pirqs on ARM (everything goes via the > virtualised interrupt controller). So maybe we should be setting > nr_pirqs to 0 on ARM. I appreciate you likely want such a patch to come > from an ARM person, so I'm fine with you making this NR_IRQS in the > meantime. As we already know that PIRQ is not used on ARM, it would make sense to use directly in this patch 0. Regards, -- Julien Grall