From: Leon Alrae <leon.alrae@imgtec.com>
To: "Maciej W. Rozycki" <macro@codesourcery.com>, qemu-devel@nongnu.org
Cc: Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [PATCH] target-mips: Fix DisasContext's ulri member initialization
Date: Thu, 11 Dec 2014 15:37:57 +0000 [thread overview]
Message-ID: <5489BA55.1000004@imgtec.com> (raw)
In-Reply-To: <alpine.DEB.1.10.1412022227360.19155@tp.orcam.me.uk>
On 02/12/2014 22:31, Maciej W. Rozycki wrote:
> Set DisasContext's ulri member to 0 or 1 as with other bool members.
>
> Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
> ---
> qemu-mips-disas-ulri.diff
> Index: qemu-git-trunk/target-mips/translate.c
> ===================================================================
> --- qemu-git-trunk.orig/target-mips/translate.c 2014-12-02 21:28:17.528936640 +0000
> +++ qemu-git-trunk/target-mips/translate.c 2014-12-02 21:28:41.028928249 +0000
> @@ -19114,7 +19114,7 @@ gen_intermediate_code_internal(MIPSCPU *
> ctx.bp = (env->CP0_Config3 >> CP0C3_BP) & 1;
> /* Restore delay slot state from the tb context. */
> ctx.hflags = (uint32_t)tb->flags; /* FIXME: maybe use 64 bits here? */
> - ctx.ulri = env->CP0_Config3 & (1 << CP0C3_ULRI);
> + ctx.ulri = (env->CP0_Config3 >> CP0C3_ULRI) & 1;
> restore_cpu_state(env, &ctx);
> #ifdef CONFIG_USER_ONLY
> ctx.mem_idx = MIPS_HFLAG_UM;
>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
prev parent reply other threads:[~2014-12-11 15:38 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-02 22:31 [Qemu-devel] [PATCH] target-mips: Fix DisasContext's ulri member initialization Maciej W. Rozycki
2014-12-11 15:37 ` Leon Alrae [this message]
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