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From: stefan.wahren@i2se.com (Stefan Wahren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH RFC] clk: mxs: Fix invalid 32-bit access to frac registers
Date: Mon, 15 Dec 2014 08:19:36 +0100	[thread overview]
Message-ID: <548E8B88.8040100@i2se.com> (raw)
In-Reply-To: <201412142019.50047.marex@denx.de>

Hi,

Am 14.12.2014 um 20:19 schrieb Marek Vasut:
> On Sunday, December 14, 2014 at 06:16:17 PM, Stefan Wahren wrote:
>>> [...]
>>>
>>> Also, it might be a good idea to zap the 0x3f mask and use HEX and DEC
>>> numbers consistently, but this is an idea for another patch.
>> Yes.
>>
>> Btw i hope this patch also fixes a SPI communication issue with our
>> hardware which forces us to bypass ref_io1 for ssp2.
>> But i will have access to that hardware tomorrow.
> Which issue would that be please ? 

i've posted the issue in the Freescale Community [1].

> What are the symptoms ?

Bits from the SPI slave are misinterpreted.

BR Stefan

[1] - https://community.freescale.com/thread/310434

>
> Best regards,
> Marek Vasut

WARNING: multiple messages have this Message-ID (diff)
From: Stefan Wahren <stefan.wahren@i2se.com>
To: Marek Vasut <marex@denx.de>
Cc: linux-kernel@vger.kernel.org, festevam@gmail.com,
	shawn.guo@linaro.org, mturquette@linaro.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH RFC] clk: mxs: Fix invalid 32-bit access to frac registers
Date: Mon, 15 Dec 2014 08:19:36 +0100	[thread overview]
Message-ID: <548E8B88.8040100@i2se.com> (raw)
In-Reply-To: <201412142019.50047.marex@denx.de>

Hi,

Am 14.12.2014 um 20:19 schrieb Marek Vasut:
> On Sunday, December 14, 2014 at 06:16:17 PM, Stefan Wahren wrote:
>>> [...]
>>>
>>> Also, it might be a good idea to zap the 0x3f mask and use HEX and DEC
>>> numbers consistently, but this is an idea for another patch.
>> Yes.
>>
>> Btw i hope this patch also fixes a SPI communication issue with our
>> hardware which forces us to bypass ref_io1 for ssp2.
>> But i will have access to that hardware tomorrow.
> Which issue would that be please ? 

i've posted the issue in the Freescale Community [1].

> What are the symptoms ?

Bits from the SPI slave are misinterpreted.

BR Stefan

[1] - https://community.freescale.com/thread/310434

>
> Best regards,
> Marek Vasut



  reply	other threads:[~2014-12-15  7:19 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-14 15:28 [PATCH RFC] clk: mxs: Fix invalid 32-bit access to frac registers Stefan Wahren
2014-12-14 15:28 ` Stefan Wahren
2014-12-14 16:12 ` Marek Vasut
2014-12-14 16:12   ` Marek Vasut
2014-12-14 17:16   ` Stefan Wahren
2014-12-14 17:16     ` Stefan Wahren
2014-12-14 19:19     ` Marek Vasut
2014-12-14 19:19       ` Marek Vasut
2014-12-15  7:19       ` Stefan Wahren [this message]
2014-12-15  7:19         ` Stefan Wahren
2014-12-17  2:44     ` Fabio Estevam
2014-12-17  2:44       ` Fabio Estevam
2014-12-17  7:58       ` Stefan Wahren
2014-12-17  7:58         ` Stefan Wahren
2014-12-17 16:00         ` Marek Vasut
2014-12-17 16:00           ` Marek Vasut
2014-12-18 15:58           ` Stefan Wahren
2014-12-18 15:58             ` Stefan Wahren
2014-12-18 16:19             ` Marek Vasut
2014-12-18 16:19               ` Marek Vasut

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