From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43352) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y0Vl8-0004Rg-DG for qemu-devel@nongnu.org; Mon, 15 Dec 2014 08:32:28 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Y0Vl2-0004aR-8h for qemu-devel@nongnu.org; Mon, 15 Dec 2014 08:32:22 -0500 Received: from mx1.redhat.com ([209.132.183.28]:38923) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y0Vl2-0004aK-2A for qemu-devel@nongnu.org; Mon, 15 Dec 2014 08:32:16 -0500 Message-ID: <548EE2D4.6070603@redhat.com> Date: Mon, 15 Dec 2014 14:32:04 +0100 From: Paolo Bonzini MIME-Version: 1.0 References: <5AD68BB8-35E0-4752-BD46-FA3CA9BC7F34@greensocs.com> In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] Atomic Instructions - comments please List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell , Mark Burton Cc: mttcg@greensocs.com, Developers qemu-devel On 15/12/2014 14:28, Peter Maydell wrote: > Personally I would start out with this approach. We're going to > need a "do this whole sequence atomically wrt other guest CPUs" > mechanism anyway, so it's not implementing something we wouldn't > otherwise need. And it's the simple thing to do. It's certainly > possible to do a more architecturally correct ld/st exclusive > implementation along the lines of how we manage TB invalidation > with the dirty bitmap, but if we can do without it then we > should try to keep the scope of this project constrained: it's > a big enough job as it is. How would "add a mutex" work unless you add a mutex or CAS to each and every qemu_st operation? Paolo