Re: nVMX MSR load/store feature

[Paolo Bonzini <pbonzini@redhat.com>]

On 15/12/2014 14:59, Eugene Korenevsky wrote:
>> The diff is just
>>
>> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
>> index d6fe958a0403..09ccf6c09435 100644
>> --- a/arch/x86/kvm/vmx.c
>> +++ b/arch/x86/kvm/vmx.c
>> @@ -8305,6 +8305,8 @@ static int nested_vmx_check_msr_switch(struct kvm_vcpu *vcpu,
>>                 WARN_ON(1);
>>                 return -EINVAL;
>>         }
>> +       if (count == 0)
>> +               return 0;
>>         if (!IS_ALIGNED(addr, 16) || addr >> maxphyaddr ||
>>             (addr + count * sizeof(struct vmx_msr_entry) - 1) >> maxphyaddr) {
>>                 pr_warn_ratelimited(
>>
>> right?
> 
> Yes. Without this check, `nested_vmx_check_msr_switch` returns -EINVAL
> for count==0 and addr==0.

Ok, thanks.  I'll push the patches to kvm/queue as soon as my testing
finishes.

Paolo