From: "Jan Beulich" <JBeulich@suse.com>
To: xen-devel <xen-devel@lists.xenproject.org>
Cc: Yang Z Zhang <yang.z.zhang@intel.com>,
Kevin Tian <kevin.tian@intel.com>,
Donald D Dugger <donald.d.dugger@intel.com>
Subject: [PATCH 2/2] VT-d: extend XSA-59 workaround to XeonE5 v3 (Haswell)
Date: Fri, 19 Dec 2014 08:41:34 +0000 [thread overview]
Message-ID: <5493F2CE0200007800050E62@mail.emea.novell.com> (raw)
In-Reply-To: <5493F0870200007800050E47@mail.emea.novell.com>
[-- Attachment #1: Type: text/plain, Size: 1183 bytes --]
Note that the datasheet lacks PCI IDs for Dev 1 Fn 0-1, so their IDs
are being added based on what https://pci-ids.ucw.cz/read/PC/8086 says.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/drivers/passthrough/vtd/quirks.c
+++ b/xen/drivers/passthrough/vtd/quirks.c
@@ -431,6 +431,7 @@ void pci_vtd_quirk(const struct pci_dev
* - Potential security issue if malicious guest trigger VT-d faults.
*/
case 0x0e28: /* Xeon-E5v2 (IvyBridge) */
+ case 0x2f28: /* Xeon-E5v3 (Haswell) */
case 0x342e: /* Tylersburg chipset (Nehalem / Westmere systems) */
case 0x3728: /* Xeon C5500/C3500 (JasperForest) */
case 0x3c28: /* Sandybridge */
@@ -443,6 +444,9 @@ void pci_vtd_quirk(const struct pci_dev
/* Xeon E5/E7 v2 */
case 0x0e00: /* host bridge */
case 0x0e01: case 0x0e04 ... 0x0e0b: /* root ports */
+ /* Xeon E5 v3 */
+ case 0x2f00: /* host bridge */
+ case 0x2f01 ... 0x2f0b: /* root ports */
/* Tylersburg (EP)/Boxboro (MP) chipsets (NHM-EP/EX, WSM-EP/EX) */
case 0x3400 ... 0x3407: /* host bridges */
case 0x3408 ... 0x3411: case 0x3420 ... 0x3421: /* root ports */
[-- Attachment #2: xsa59-XeonE5-v3.patch --]
[-- Type: text/plain, Size: 1234 bytes --]
VT-d: extend XSA-59 workaround to XeonE5 v3 (Haswell)
Note that the datasheet lacks PCI IDs for Dev 1 Fn 0-1, so their IDs
are being added based on what https://pci-ids.ucw.cz/read/PC/8086 says.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/drivers/passthrough/vtd/quirks.c
+++ b/xen/drivers/passthrough/vtd/quirks.c
@@ -431,6 +431,7 @@ void pci_vtd_quirk(const struct pci_dev
* - Potential security issue if malicious guest trigger VT-d faults.
*/
case 0x0e28: /* Xeon-E5v2 (IvyBridge) */
+ case 0x2f28: /* Xeon-E5v3 (Haswell) */
case 0x342e: /* Tylersburg chipset (Nehalem / Westmere systems) */
case 0x3728: /* Xeon C5500/C3500 (JasperForest) */
case 0x3c28: /* Sandybridge */
@@ -443,6 +444,9 @@ void pci_vtd_quirk(const struct pci_dev
/* Xeon E5/E7 v2 */
case 0x0e00: /* host bridge */
case 0x0e01: case 0x0e04 ... 0x0e0b: /* root ports */
+ /* Xeon E5 v3 */
+ case 0x2f00: /* host bridge */
+ case 0x2f01 ... 0x2f0b: /* root ports */
/* Tylersburg (EP)/Boxboro (MP) chipsets (NHM-EP/EX, WSM-EP/EX) */
case 0x3400 ... 0x3407: /* host bridges */
case 0x3408 ... 0x3411: case 0x3420 ... 0x3421: /* root ports */
[-- Attachment #3: Type: text/plain, Size: 126 bytes --]
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next prev parent reply other threads:[~2014-12-19 8:41 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-19 8:31 [PATCH 0/2] VT-d: extend XSA-59 workaround Jan Beulich
2014-12-19 8:40 ` [PATCH 1/2] VT-d: make XSA-59 workaround fully cover XeonE5/E7 v2 Jan Beulich
2015-03-17 17:39 ` Dugger, Donald D
2015-03-18 8:25 ` Jan Beulich
2014-12-19 8:41 ` Jan Beulich [this message]
2015-03-17 17:41 ` [PATCH 2/2] VT-d: extend XSA-59 workaround to XeonE5 v3 (Haswell) Dugger, Donald D
2015-03-18 8:18 ` Jan Beulich
2015-01-05 16:26 ` [PATCH 0/2] VT-d: extend XSA-59 workaround Konrad Rzeszutek Wilk
2015-01-05 16:28 ` Dugger, Donald D
2015-01-05 16:42 ` Konrad Rzeszutek Wilk
2015-01-06 8:41 ` Jan Beulich
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