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From: Oleksij Rempel <linux@rempel-privat.de>
To: ath9k-devel@lists.ath9k.org
Subject: [ath9k-devel] AR9271 Clock rate
Date: Fri, 19 Dec 2014 16:10:21 +0100	[thread overview]
Message-ID: <54943FDD.5090401@rempel-privat.de> (raw)
In-Reply-To: <CAMfcBUSWJQZ3DtGaHQT-c_JdyLJctEt4z7PGdkBVe=Evx-cwxg@mail.gmail.com>

Am 19.12.2014 um 14:53 schrieb Adrian Nicolau:
> I understand this, and neither was I expecting that the REG_WRITE would
> overwrite the common->clockrate value. My question can be rephrased: Why
> are there two different clock rate values defined for AR9271: one of 117
> MHz which is written in the registry, and the other of 44 MHz which is
> set in the ath9k_hw_set_clockrate function? There is no checking done in
> this function for AR_SREV_9271 like the one made for AR_SREV_9287 [1]
> which sets the clock at 117MHz as well.
> 
> [1] https://github.com/torvalds/linux/blob/master/drivers/net/wireless/ath/ath9k/hw.c#L46

Ach... ok. you right.

pll related changes from the host are ignored:
https://github.com/olerem/open-ath9k-htc-firmware/blob/master/target_firmware/wlan/if_ath.c#L1456

> Thank you,
> Adrian
> 
> On Fri, Dec 19, 2014 at 3:25 PM, Oleksij Rempel <linux@rempel-privat.de
> <mailto:linux@rempel-privat.de>> wrote:
> 
>     Am 19.12.2014 um 10:21 schrieb Adrian Nicolau:
>     > Hello,
>     >
>     > I am using a TL-WN722N for a Wi-Fi ToF project; the SOC is AR9271
>     and I
>     > obtained the ath9k_htc source code via backports version 3.17.1-1. For
>     > ToF measurements, the higher the clock rate of the SOC, the
>     better, and
>     > I know that AR9271 has a 117 MHz one.
>     > Reading through the code, in file ath/ath9k/hw.c, function
>     > ath9k_hw_set_clockrate [1] there is no entry for AS_SREV_9271, leaving
>     > the clockrate to be 44MHz in the common structure and throughout
>     execution.
>     > The 117MHz setting is done later in the code by writing to a
>     registry [2].
>     >
>     > I am wondering why the writing to the registry is not reflected in the
>     > common structure as well.
>     >
>     > [1]
>     https://github.com/torvalds/linux/blob/master/drivers/net/wireless/ath/ath9k/hw.c#L39
>     > [2]
>     https://github.com/torvalds/linux/blob/master/drivers/net/wireless/ath/ath9k/hw.c#L864
> 
>     Because you are writing to wrong offset.
> 
>     REG_WRITE will do it to a memory region mapped to mac core for this SoC.
>     --
>     Regards,
>     Oleksij
> 


-- 
Regards,
Oleksij

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  reply	other threads:[~2014-12-19 15:10 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-19  9:21 [ath9k-devel] AR9271 Clock rate Adrian Nicolau
2014-12-19 13:25 ` Oleksij Rempel
2014-12-19 13:53   ` Adrian Nicolau
2014-12-19 15:10     ` Oleksij Rempel [this message]
2014-12-19 15:14       ` Oleksij Rempel

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