diff for duplicates of <54AD44E8.5000105@gmail.com> diff --git a/a/1.txt b/N1/1.txt index b25185e..78e359b 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -36,13 +36,13 @@ Sebastian > interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; > }; > - -> - gpio4: gpio at 5000 { +> - gpio4: gpio@5000 { > - compatible = "snps,dw-apb-gpio"; > - reg = <0x5000 0x400>; > - #address-cells = <1>; > - #size-cells = <0>; > - -> - porte: gpio-port at 4 { +> - porte: gpio-port@4 { > - compatible = "snps,dw-apb-gpio-port"; > - gpio-controller; > - #gpio-cells = <2>; @@ -51,13 +51,13 @@ Sebastian > - }; > - }; > - -> - gpio5: gpio at c000 { +> - gpio5: gpio@c000 { > - compatible = "snps,dw-apb-gpio"; > - reg = <0xc000 0x400>; > - #address-cells = <1>; > - #size-cells = <0>; > - -> - portf: gpio-port at 5 { +> - portf: gpio-port@5 { > - compatible = "snps,dw-apb-gpio-port"; > - gpio-controller; > - #gpio-cells = <2>; @@ -67,18 +67,18 @@ Sebastian > - }; > }; > -> chip: chip-control at ea0000 { +> chip: chip-control@ea0000 { > @@ -474,6 +444,21 @@ > ranges = <0 0xfc0000 0x10000>; > interrupt-parent = <&sic>; > -> + sm_gpio1: gpio at 5000 { +> + sm_gpio1: gpio@5000 { > + compatible = "snps,dw-apb-gpio"; > + reg = <0x5000 0x400>; > + #address-cells = <1>; > + #size-cells = <0>; > + -> + portf: gpio-port at 5 { +> + portf: gpio-port@5 { > + compatible = "snps,dw-apb-gpio-port"; > + gpio-controller; > + #gpio-cells = <2>; @@ -87,20 +87,20 @@ Sebastian > + }; > + }; > + -> i2c2: i2c at 7000 { +> i2c2: i2c@7000 { > compatible = "snps,designware-i2c"; > #address-cells = <1>; > @@ -524,6 +509,21 @@ > status = "disabled"; > }; > -> + sm_gpio0: gpio at c000 { +> + sm_gpio0: gpio@c000 { > + compatible = "snps,dw-apb-gpio"; > + reg = <0xc000 0x400>; > + #address-cells = <1>; > + #size-cells = <0>; > + -> + porte: gpio-port at 4 { +> + porte: gpio-port@4 { > + compatible = "snps,dw-apb-gpio-port"; > + gpio-controller; > + #gpio-cells = <2>; @@ -109,7 +109,7 @@ Sebastian > + }; > + }; > + -> sysctrl: pin-controller at d000 { +> sysctrl: pin-controller@d000 { > compatible = "marvell,berlin2q-system-ctrl"; > reg = <0xd000 0x100>; > diff --git a/a/content_digest b/N1/content_digest index abab9ce..8263772 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,9 +1,21 @@ "ref\01419584281-4811-1-git-send-email-jszhang@marvell.com\0" "ref\01419584281-4811-4-git-send-email-jszhang@marvell.com\0" - "From\0sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)\0" - "Subject\0[PATCH v2 3/3] ARM: dts: berlin: correct BG2Q's SM GPIO location.\0" + "From\0Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\0" + "Subject\0Re: [PATCH v2 3/3] ARM: dts: berlin: correct BG2Q's SM GPIO location.\0" "Date\0Wed, 07 Jan 2015 15:38:32 +0100\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Jisheng Zhang <jszhang@marvell.com>" + robh+dt@kernel.org + pawel.moll@arm.com + mark.rutland@arm.com + ijc+devicetree@hellion.org.uk + galak@codeaurora.org + linux@arm.linux.org.uk + antoine.tenart@free-electrons.com + alexandre.belloni@free-electrons.com + " thomas.petazzoni@free-electrons.com\0" + "Cc\0devicetree@vger.kernel.org" + linux-arm-kernel@lists.infradead.org + " linux-kernel@vger.kernel.org\0" "\00:1\0" "b\0" "On 26.12.2014 09:58, Jisheng Zhang wrote:\n" @@ -44,13 +56,13 @@ "> \t\t\t\tinterrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;\n" "> \t\t\t};\n" "> -\n" - "> -\t\t\tgpio4: gpio at 5000 {\n" + "> -\t\t\tgpio4: gpio@5000 {\n" "> -\t\t\t\tcompatible = \"snps,dw-apb-gpio\";\n" "> -\t\t\t\treg = <0x5000 0x400>;\n" "> -\t\t\t\t#address-cells = <1>;\n" "> -\t\t\t\t#size-cells = <0>;\n" "> -\n" - "> -\t\t\t\tporte: gpio-port at 4 {\n" + "> -\t\t\t\tporte: gpio-port@4 {\n" "> -\t\t\t\t\tcompatible = \"snps,dw-apb-gpio-port\";\n" "> -\t\t\t\t\tgpio-controller;\n" "> -\t\t\t\t\t#gpio-cells = <2>;\n" @@ -59,13 +71,13 @@ "> -\t\t\t\t};\n" "> -\t\t\t};\n" "> -\n" - "> -\t\t\tgpio5: gpio at c000 {\n" + "> -\t\t\tgpio5: gpio@c000 {\n" "> -\t\t\t\tcompatible = \"snps,dw-apb-gpio\";\n" "> -\t\t\t\treg = <0xc000 0x400>;\n" "> -\t\t\t\t#address-cells = <1>;\n" "> -\t\t\t\t#size-cells = <0>;\n" "> -\n" - "> -\t\t\t\tportf: gpio-port at 5 {\n" + "> -\t\t\t\tportf: gpio-port@5 {\n" "> -\t\t\t\t\tcompatible = \"snps,dw-apb-gpio-port\";\n" "> -\t\t\t\t\tgpio-controller;\n" "> -\t\t\t\t\t#gpio-cells = <2>;\n" @@ -75,18 +87,18 @@ "> -\t\t\t};\n" "> \t\t};\n" ">\n" - "> \t\tchip: chip-control at ea0000 {\n" + "> \t\tchip: chip-control@ea0000 {\n" "> @@ -474,6 +444,21 @@\n" "> \t\t\tranges = <0 0xfc0000 0x10000>;\n" "> \t\t\tinterrupt-parent = <&sic>;\n" ">\n" - "> +\t\t\tsm_gpio1: gpio at 5000 {\n" + "> +\t\t\tsm_gpio1: gpio@5000 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-gpio\";\n" "> +\t\t\t\treg = <0x5000 0x400>;\n" "> +\t\t\t\t#address-cells = <1>;\n" "> +\t\t\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\t\t\tportf: gpio-port at 5 {\n" + "> +\t\t\t\tportf: gpio-port@5 {\n" "> +\t\t\t\t\tcompatible = \"snps,dw-apb-gpio-port\";\n" "> +\t\t\t\t\tgpio-controller;\n" "> +\t\t\t\t\t#gpio-cells = <2>;\n" @@ -95,20 +107,20 @@ "> +\t\t\t\t};\n" "> +\t\t\t};\n" "> +\n" - "> \t\t\ti2c2: i2c at 7000 {\n" + "> \t\t\ti2c2: i2c@7000 {\n" "> \t\t\t\tcompatible = \"snps,designware-i2c\";\n" "> \t\t\t\t#address-cells = <1>;\n" "> @@ -524,6 +509,21 @@\n" "> \t\t\t\tstatus = \"disabled\";\n" "> \t\t\t};\n" ">\n" - "> +\t\t\tsm_gpio0: gpio at c000 {\n" + "> +\t\t\tsm_gpio0: gpio@c000 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-gpio\";\n" "> +\t\t\t\treg = <0xc000 0x400>;\n" "> +\t\t\t\t#address-cells = <1>;\n" "> +\t\t\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\t\t\tporte: gpio-port at 4 {\n" + "> +\t\t\t\tporte: gpio-port@4 {\n" "> +\t\t\t\t\tcompatible = \"snps,dw-apb-gpio-port\";\n" "> +\t\t\t\t\tgpio-controller;\n" "> +\t\t\t\t\t#gpio-cells = <2>;\n" @@ -117,9 +129,9 @@ "> +\t\t\t\t};\n" "> +\t\t\t};\n" "> +\n" - "> \t\t\tsysctrl: pin-controller at d000 {\n" + "> \t\t\tsysctrl: pin-controller@d000 {\n" "> \t\t\t\tcompatible = \"marvell,berlin2q-system-ctrl\";\n" "> \t\t\t\treg = <0xd000 0x100>;\n" > -b6a0f9317e81c6c38b64cca5e11251b2bf2a1d68e98166c8b6f8249dd3c0785e +e1158064429e9cbf91bb914be05637e892d9ace568f48948c919472d21f152e8
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