From: sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/3] ARM: dts: berlin: add pmu node for BG2Q and BG2CD
Date: Wed, 07 Jan 2015 15:39:02 +0100 [thread overview]
Message-ID: <54AD4506.6000304@gmail.com> (raw)
In-Reply-To: <1419584281-4811-2-git-send-email-jszhang@marvell.com>
On 26.12.2014 09:57, Jisheng Zhang wrote:
> This patch adds the pmu node, enabling the PMU unit on Marvell BG2Q and
> BG2CD SoCs.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Applied to berlin/dt.
Thanks!
> ---
> arch/arm/boot/dts/berlin2cd.dtsi | 5 +++++
> arch/arm/boot/dts/berlin2q.dtsi | 8 ++++++++
> 2 files changed, 13 insertions(+)
>
> diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
> index 230df3b..a318bc3 100644
> --- a/arch/arm/boot/dts/berlin2cd.dtsi
> +++ b/arch/arm/boot/dts/berlin2cd.dtsi
> @@ -45,6 +45,11 @@
>
> ranges = <0 0xf7000000 0x1000000>;
>
> + pmu {
> + compatible = "arm,cortex-a9-pmu";
> + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> sdhci0: sdhci at ab0000 {
> compatible = "mrvl,pxav3-mmc";
> reg = <0xab0000 0x200>;
> diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
> index 35253c9..933dcbb 100644
> --- a/arch/arm/boot/dts/berlin2q.dtsi
> +++ b/arch/arm/boot/dts/berlin2q.dtsi
> @@ -63,6 +63,14 @@
> ranges = <0 0xf7000000 0x1000000>;
> interrupt-parent = <&gic>;
>
> + pmu {
> + compatible = "arm,cortex-a9-pmu";
> + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> sdhci0: sdhci at ab0000 {
> compatible = "mrvl,pxav3-mmc";
> reg = <0xab0000 0x200>;
>
WARNING: multiple messages have this Message-ID (diff)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
To: Jisheng Zhang <jszhang@marvell.com>,
robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
linux@arm.linux.org.uk, antoine.tenart@free-electrons.com,
alexandre.belloni@free-electrons.com,
thomas.petazzoni@free-electrons.com
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/3] ARM: dts: berlin: add pmu node for BG2Q and BG2CD
Date: Wed, 07 Jan 2015 15:39:02 +0100 [thread overview]
Message-ID: <54AD4506.6000304@gmail.com> (raw)
In-Reply-To: <1419584281-4811-2-git-send-email-jszhang@marvell.com>
On 26.12.2014 09:57, Jisheng Zhang wrote:
> This patch adds the pmu node, enabling the PMU unit on Marvell BG2Q and
> BG2CD SoCs.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Applied to berlin/dt.
Thanks!
> ---
> arch/arm/boot/dts/berlin2cd.dtsi | 5 +++++
> arch/arm/boot/dts/berlin2q.dtsi | 8 ++++++++
> 2 files changed, 13 insertions(+)
>
> diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
> index 230df3b..a318bc3 100644
> --- a/arch/arm/boot/dts/berlin2cd.dtsi
> +++ b/arch/arm/boot/dts/berlin2cd.dtsi
> @@ -45,6 +45,11 @@
>
> ranges = <0 0xf7000000 0x1000000>;
>
> + pmu {
> + compatible = "arm,cortex-a9-pmu";
> + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> sdhci0: sdhci@ab0000 {
> compatible = "mrvl,pxav3-mmc";
> reg = <0xab0000 0x200>;
> diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
> index 35253c9..933dcbb 100644
> --- a/arch/arm/boot/dts/berlin2q.dtsi
> +++ b/arch/arm/boot/dts/berlin2q.dtsi
> @@ -63,6 +63,14 @@
> ranges = <0 0xf7000000 0x1000000>;
> interrupt-parent = <&gic>;
>
> + pmu {
> + compatible = "arm,cortex-a9-pmu";
> + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> sdhci0: sdhci@ab0000 {
> compatible = "mrvl,pxav3-mmc";
> reg = <0xab0000 0x200>;
>
next prev parent reply other threads:[~2015-01-07 14:39 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-26 8:57 [PATCH v2 0/3] ARM: dts: berlin: add PMU and twd's cpu mask and fix GPIO locations Jisheng Zhang
2014-12-26 8:57 ` Jisheng Zhang
2014-12-26 8:57 ` Jisheng Zhang
2014-12-26 8:57 ` [PATCH v2 1/3] ARM: dts: berlin: add pmu node for BG2Q and BG2CD Jisheng Zhang
2014-12-26 8:57 ` Jisheng Zhang
2014-12-26 8:57 ` Jisheng Zhang
2015-01-07 14:39 ` Sebastian Hesselbarth [this message]
2015-01-07 14:39 ` Sebastian Hesselbarth
2014-12-26 8:58 ` [PATCH v2 2/3] ARM: dts: berlin: add PPI cpu mask to twd timer interrupts Jisheng Zhang
2014-12-26 8:58 ` Jisheng Zhang
2014-12-26 8:58 ` Jisheng Zhang
2015-01-07 14:39 ` Sebastian Hesselbarth
2015-01-07 14:39 ` Sebastian Hesselbarth
2015-01-07 14:39 ` Sebastian Hesselbarth
2014-12-26 8:58 ` [PATCH v2 3/3] ARM: dts: berlin: correct BG2Q's SM GPIO location Jisheng Zhang
2014-12-26 8:58 ` Jisheng Zhang
2014-12-26 8:58 ` Jisheng Zhang
2015-01-07 14:38 ` Sebastian Hesselbarth
2015-01-07 14:38 ` Sebastian Hesselbarth
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=54AD4506.6000304@gmail.com \
--to=sebastian.hesselbarth@gmail.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.