From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: Re: [PATCH 3/3] x86/HVM: make hvm_efer_valid() honor guest features Date: Thu, 8 Jan 2015 18:57:40 +0000 Message-ID: <54AED324.1040600@citrix.com> References: <54AEAD2C0200007800052B56@mail.emea.novell.com> <54AEAEFD0200007800052B81@mail.emea.novell.com> <20150108155607.GD5043@deinos.phlegethon.org> <54AEB8B50200007800052C74@mail.emea.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Y9IHB-0006WQ-EF for xen-devel@lists.xenproject.org; Thu, 08 Jan 2015 18:57:45 +0000 In-Reply-To: <54AEB8B50200007800052C74@mail.emea.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich , Tim Deegan Cc: xen-devel , Keir Fraser List-Id: xen-devel@lists.xenproject.org On 08/01/15 16:04, Jan Beulich wrote: >>>> On 08.01.15 at 16:56, wrote: >> At 15:23 +0000 on 08 Jan (1420727005), Jan Beulich wrote: >>> + if ( (value & EFER_LMSLE) && !cpu_has_lmsl ) >>> + return 0; >> I see this bit has no CPUID flag, and the docs don't seem to suggest >> that it would ever not be valid. Are there real CPUs where it can't >> be set? > Yes, I'm afraid AMD introduced this subsequent to SVM, iirc upon > VMware request. > >> My reviewed-by: stands anyway as this is an improvement over the >> current code. Just wondering whether this needs to go on the list >> of interesting edge cazses for Andrew's feature-levelling rewrite. > Yes, dealing with this ought to be interesting. :( I had pessimistically assumed I wasn't going to be able to get away with purely architectural state in the new shiny world. I will take care to accommodate this in the next iteration. ~Andrew