From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60055) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YAhyf-0000AI-G9 for qemu-devel@nongnu.org; Mon, 12 Jan 2015 11:36:30 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YAhyX-0007Mw-Rl for qemu-devel@nongnu.org; Mon, 12 Jan 2015 11:36:29 -0500 Received: from cantor2.suse.de ([195.135.220.15]:42998 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YAhyX-0007Me-Lm for qemu-devel@nongnu.org; Mon, 12 Jan 2015 11:36:21 -0500 Message-ID: <54B3F804.7020402@suse.de> Date: Mon, 12 Jan 2015 17:36:20 +0100 From: Alexander Graf MIME-Version: 1.0 References: <1420560191-48029-1-git-send-email-agraf@suse.de> <1420560191-48029-4-git-send-email-agraf@suse.de> <54B3F469.2050602@huawei.com> In-Reply-To: <54B3F469.2050602@huawei.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 3/4] arm: Add PCIe host bridge in virt machine List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Claudio Fontana , qemu-devel@nongnu.org Cc: Peter Maydell , ard.biesheuvel@linaro.org, mst@redhat.com, rob.herring@linaro.org, stuart.yoder@freescale.com, a.rigo@virtualopensystems.com On 12.01.15 17:20, Claudio Fontana wrote: > Just adding a nit here below: > > On 06.01.2015 17:03, Alexander Graf wrote: >> Now that we have a working "generic" PCIe host bridge driver, we can plug >> it into ARMs virt machine to always have PCIe available to normal ARM VMs. >> >> I've successfully managed to expose a Bochs VGA device, XHCI and an e1000 >> into an AArch64 VM with this and they all lived happily ever after. >> >> Signed-off-by: Alexander Graf >> >> --- >> >> Linux 3.19 only supports the generic PCIe host bridge driver for 32bit ARM >> systems. If you want to use it with AArch64 guests, please apply the following >> patch or wait until upstream cleaned up the code properly: >> >> http://csgraf.de/agraf/pci/pci-3.19.patch >> --- [...] >> + nodename = g_strdup_printf("/pcie@%" PRIx64, base); >> + qemu_fdt_add_subnode(vbi->fdt, nodename); >> + qemu_fdt_setprop_string(vbi->fdt, nodename, >> + "compatible", "pci-host-ecam-generic"); >> + qemu_fdt_setprop_string(vbi->fdt, nodename, "device_type", "pci"); >> + qemu_fdt_setprop_cell(vbi->fdt, nodename, "#address-cells", 3); >> + qemu_fdt_setprop_cell(vbi->fdt, nodename, "#size-cells", 2); >> + qemu_fdt_setprop_cells(vbi->fdt, nodename, "bus-range", 0, 1); >> + >> + qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "reg", >> + 2, base_ecam, 2, size_ecam); >> + qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "ranges", >> + 1, 0x01000000, 2, 0, >> + 2, base_ioport, 2, size_ioport, >> + >> + 1, 0x02000000, 2, base_mmio, >> + 2, base_mmio, 2, size_mmio); >> + >> + qemu_fdt_setprop_cell(vbi->fdt, nodename, "#interrupt-cells", 1); >> + qemu_fdt_setprop_cells(vbi->fdt, nodename, "interrupt-map", >> + 0, 0, 0, /* device */ >> + 0, /* PCI irq */ >> + gic_phandle, GIC_FDT_IRQ_TYPE_SPI, irq, >> + GIC_FDT_IRQ_FLAGS_LEVEL_HI /* system irq */); > > > nit: are there two extra spaces here? (alignment) Yes, because the attribute spans 2 lines ;) Alex