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Date: Mon, 12 Jan 2015 22:06:38 +0100
From: Alexander Graf <agraf@suse.de>
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Subject: Re: [Qemu-devel] [PATCH 2/4] pci: Add generic PCIe host bridge
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To: Peter Maydell <peter.maydell@linaro.org>
Cc: Rob Herring <rob.herring@linaro.org>, "Michael S. Tsirkin" <mst@redhat.com>, QEMU Developers <qemu-devel@nongnu.org>, Ard Biesheuvel <ard.biesheuvel@linaro.org>, Claudio Fontana <claudio.fontana@huawei.com>, "stuart.yoder@freescale.com" <stuart.yoder@freescale.com>, alvise rigo <a.rigo@virtualopensystems.com>



On 12.01.15 21:08, Peter Maydell wrote:
> On 12 January 2015 at 17:38, Alexander Graf <agraf@suse.de> wrote:
>> I'd prefer to keep things as easy as we humanly can for now. Then add
>> MSI. And if we then realize that we still need 4 rather than 1 shared
>> interrupt lines we can still change it :)
> 
> Except that that would be a breaking change, so I would prefer
> to think ahead where possible; at some point there will come
> a time when we really can't make breaking changes to this
> board any more...

Works for me, then we stay at a single interrupt line. The only reason
we have 4 in PCI is that back in the day you could have non-sharing PCI
devices that were essentially ISA ones.

If you actually care about interrupt latency and performance you will
want more than 4 IRQ lines, so you'll want MSI.


Alex