From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44136) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YAp7C-0007OV-0m for qemu-devel@nongnu.org; Mon, 12 Jan 2015 19:13:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YAp78-0006YA-Qd for qemu-devel@nongnu.org; Mon, 12 Jan 2015 19:13:45 -0500 Received: from cantor2.suse.de ([195.135.220.15]:49180 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YAp78-0006Y2-Jb for qemu-devel@nongnu.org; Mon, 12 Jan 2015 19:13:42 -0500 Message-ID: <54B46332.5090706@suse.de> Date: Tue, 13 Jan 2015 01:13:38 +0100 From: Alexander Graf MIME-Version: 1.0 References: <1420560191-48029-1-git-send-email-agraf@suse.de> <1420560191-48029-3-git-send-email-agraf@suse.de> <54B40692.9040909@suse.de> <54B4375E.3070200@suse.de> In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 2/4] pci: Add generic PCIe host bridge List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Rob Herring , "Michael S. Tsirkin" , QEMU Developers , Ard Biesheuvel , Claudio Fontana , "stuart.yoder@freescale.com" , alvise rigo On 12.01.15 22:20, Peter Maydell wrote: > On 12 January 2015 at 21:06, Alexander Graf wrote: >> >> >> On 12.01.15 21:08, Peter Maydell wrote: >>> On 12 January 2015 at 17:38, Alexander Graf wrote: >>>> I'd prefer to keep things as easy as we humanly can for now. Then add >>>> MSI. And if we then realize that we still need 4 rather than 1 shared >>>> interrupt lines we can still change it :) >>> >>> Except that that would be a breaking change, so I would prefer >>> to think ahead where possible; at some point there will come >>> a time when we really can't make breaking changes to this >>> board any more... >> >> Works for me, then we stay at a single interrupt line. The only reason >> we have 4 in PCI is that back in the day you could have non-sharing PCI >> devices that were essentially ISA ones. > > Well, also your typical small system probably doesn't have more > than 4 PCI slots and so 4 IRQs is enough to give them each one. > Most small VMs probably won't have more than four PCI devices > either... My main problem with multiple IRQs is that we'd have to describe the mapping. I'd rather not have a fixed number of PCI slots hardcoded anywhere, especially not in the map. So the only chance we have to keep it dynamic would be to mask some field of the devfn to PCI IRQ lines. How about we map the slots with a simple, pretty generic mask on the lower bitsto 4 host IRQ lines? Would that make everyone happy? I still don't think it's worth the hassle, but I'd be happy to do it if people insist. Alex