From: Ander Conselvan de Oliveira <conselvan2@gmail.com>
To: Jani Nikula <jani.nikula@linux.intel.com>,
shuang.he@intel.com, ethan.gao@intel.com,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Initialize primary plane src/dst coords when reading hw state
Date: Tue, 13 Jan 2015 10:34:20 +0200 [thread overview]
Message-ID: <54B4D88C.2090004@gmail.com> (raw)
In-Reply-To: <87r3uzksbo.fsf@intel.com>
On 01/13/2015 10:17 AM, Jani Nikula wrote:
>
> Ander, please see if these results make sense.
>
> BR,
> Jani.
>
> On Tue, 13 Jan 2015, shuang.he@intel.com wrote:
>> Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
>> -------------------------------------Summary-------------------------------------
>> Platform Delta drm-intel-nightly Series Applied
>> PNV -1 354/354 353/354
>> ILK 201/201 201/201
>> SNB +1-1 401/424 401/424
>> IVB -2 488/488 486/488
>> BYT 278/278 278/278
>> HSW -42 529/529 487/529
>> BDW -1 405/405 404/405
>> -------------------------------------Detailed-------------------------------------
>> Platform Test drm-intel-nightly Series Applied
>> *PNV igt_gem_concurrent_blit_cpu-rcs-overwrite-source-interruptible PASS(2, M7) NO_RESULT(1, M7)
I'm not sure of what to make out of NO_RESULT.
>> *SNB igt_gem_concurrent_blit_gtt-rcs-early-read-interruptible PASS(7, M35M22) DMESG_WARN(1, M35)
PRTS doesn't seem to have saved the dmesg for this one.
>> *IVB igt_kms_plane_plane-panning-top-left-pipe-C-plane-2 PASS(2, M21M4) DMESG_WARN(1, M4)
<3>[ 8370.823428] [drm:intel_set_pch_fifo_underrun_reporting [i915]] *ERROR* uncleared pch fifo underrun on pch transcoder C
>> *IVB igt_kms_plane_plane-position-hole-pipe-C-plane-1 PASS(2, M21M4) DMESG_WARN(1, M4)
<3>[ 8417.687721] [drm:intel_dp_start_link_train [i915]] *ERROR* too many voltage retries, give up
<3>[ 8417.694032] [drm:intel_dp_start_link_train [i915]] *ERROR* too many voltage retries, give up
<3>[ 8417.700334] [drm:intel_dp_start_link_train [i915]] *ERROR* too many voltage retries, give up
<3>[ 8417.706640] [drm:intel_dp_start_link_train [i915]] *ERROR* too many voltage retries, give up
<3>[ 8417.712947] [drm:intel_dp_start_link_train [i915]] *ERROR* too many voltage retries, give up
<3>[ 8417.719256] [drm:intel_dp_start_link_train [i915]] *ERROR* too many voltage retries, give up
<3>[ 8417.727057] [drm:intel_dp_complete_link_train [i915]] *ERROR* failed to train DP, aborting
>> *HSW igt_gem_concurrent_blit_gttX-bcs-early-read-interruptible DMESG_WARN(2, M40)PASS(2, M20M19) DMESG_WARN(1, M19)
It seems PRTS also forgot to save the dmesg for this one.
>> *BDW igt_gem_concurrent_blit_gtt-bcs-gpu-read-after-write-interruptible PASS(6, M30M28) DMESG_WARN(1, M30)
<3>[ 7724.684295] [drm:hsw_unclaimed_reg_detect.isra.10 [i915]] *ERROR* Unclaimed register detected. Please use the i915.mmio_debug=1 to debug this problem.gem_concurrent_blit: starting subtest gtt-bcs-gpu-read-after-write-interruptible
Are any of those known issues?
Thanks,
Ander
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next prev parent reply other threads:[~2015-01-13 8:34 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-12 15:36 [PATCH] drm/i915: Initialize primary plane src/dst coords when reading hw state Ander Conselvan de Oliveira
2015-01-12 23:34 ` Daniel Vetter
2015-01-13 11:24 ` Ville Syrjälä
2015-01-13 22:23 ` Daniel Vetter
2015-01-19 13:43 ` [PATCH i-g-t] kms_plane: Add test that suspends/resumes before getting crc Ander Conselvan de Oliveira
2015-01-20 9:35 ` Daniel Vetter
2015-01-13 0:48 ` [PATCH] drm/i915: Initialize primary plane src/dst coords when reading hw state shuang.he
2015-01-13 8:17 ` Jani Nikula
2015-01-13 8:34 ` Ander Conselvan de Oliveira [this message]
2015-01-13 8:43 ` He, Shuang
2015-01-19 13:51 ` [PATCH v2] " Ander Conselvan de Oliveira
2015-01-19 23:45 ` shuang.he
2015-01-20 9:22 ` Daniel Vetter
2015-01-20 9:32 ` Ander Conselvan de Oliveira
2015-01-20 9:33 ` Ander Conselvan de Oliveira
2015-01-20 9:46 ` Ville Syrjälä
2015-01-20 9:56 ` Daniel Vetter
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