From mboxrd@z Thu Jan  1 00:00:00 1970
From: Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [PATCH 5/5] KVM: nVMX: Enable nested posted interrupt processing.
Date: Mon, 19 Jan 2015 12:43:17 +0100
Message-ID: <54BCEDD5.40301@redhat.com>
References: <CACzj_yWjkW0azZGEVHKkQZJWRjNykxCfBRz=tEA=d624WGzccw@mail.gmail.com>
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Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Wanpeng Li <wanpeng.li@linux.intel.com>,
	Jan Kiszka <jan.kiszka@web.de>
To: Wincy Van <fanwenyi0529@gmail.com>, gleb@kernel.org,
	yang.z.zhang@intel.com
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Hi Wincy,

there is only one thing that I don't understand in this patchset, and it is:

On 16/01/2015 06:59, Wincy Van wrote:
> +       /*
> +        * if vcpu is in L2, we are fast enough to complete
> +        * before L1 changes/destroys vmcs12.
> +        */

... this comment.  What do you mean exactly?

Paolo

> +       local_irq_save(flags);
> +       vmcs12 = get_vmcs12(vcpu);
> +       if (!is_guest_mode(vcpu) || !vmcs12) {
> +               r = -1;
> +               goto out;
> +       }
> +       if (vector == vmcs12->posted_intr_nv &&
> +           nested_cpu_has_posted_intr(vmcs12)) {
> +               if (vcpu->mode == IN_GUEST_MODE)
> +                       apic->send_IPI_mask(get_cpu_mask(vcpu->cpu),
> +                               POSTED_INTR_VECTOR);
> +               else {
> +                       r = -1;
> +                       goto out;
> +               }
> +