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From: Deepak S <deepak.s@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/7] drm/i915: Disable RC6 before configuring in on VLV/CHV
Date: Tue, 20 Jan 2015 08:47:50 +0530	[thread overview]
Message-ID: <54BDC8DE.5050100@linux.intel.com> (raw)
In-Reply-To: <1421668253-18641-2-git-send-email-ville.syrjala@linux.intel.com>


On Monday 19 January 2015 05:20 PM, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Follow the sequence in the BIOS spec and clear the RC_CONTROL register
> before changing any of the other RC6/RP registers.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/intel_pm.c | 6 ++++++
>   1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index b73d601..e7f0f21 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4712,6 +4712,9 @@ static void cherryview_enable_rps(struct drm_device *dev)
>   	 * hasn't enabled a state yet where we need forcewake, BIOS may have.*/
>   	gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
>   
> +	/*  Disable RC states. */
> +	I915_WRITE(GEN6_RC_CONTROL, 0);
> +
>   	/* 2a: Program RC6 thresholds.*/
>   	I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 40 << 16);
>   	I915_WRITE(GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */
> @@ -4801,6 +4804,9 @@ static void valleyview_enable_rps(struct drm_device *dev)
>   	/* If VLV, Forcewake all wells, else re-direct to regular path */
>   	gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
>   
> +	/*  Disable RC states. */
> +	I915_WRITE(GEN6_RC_CONTROL, 0);
> +
>   	I915_WRITE(GEN6_RP_UP_THRESHOLD, 59400);
>   	I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 245000);
>   	I915_WRITE(GEN6_RP_UP_EI, 66000);

Reviewed-by: Deepak S<deepak.s@intel.com>

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  parent reply	other threads:[~2015-01-20  3:21 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-19 11:50 [PATCH 0/7] drm/i915: CHV RC6/turbo fixes and improvements ville.syrjala
2015-01-19 11:50 ` [PATCH 1/7] drm/i915: Disable RC6 before configuring in on VLV/CHV ville.syrjala
2015-01-19 12:23   ` Chris Wilson
2015-01-20  3:17   ` Deepak S [this message]
2015-01-19 11:50 ` [PATCH 2/7] drm/i915: Change VLV GEN6_RP_DOWN_TIMEOUT value to decimal ville.syrjala
2015-01-19 12:23   ` Chris Wilson
2015-01-20  3:19   ` Deepak S
2015-01-19 11:50 ` [PATCH 3/7] drm/i915: Configure GEN6_RP_DOWN_TIMEOUT on CHV ville.syrjala
2015-01-20  3:15   ` Deepak S
2015-01-20  9:28     ` Ville Syrjälä
2015-01-19 11:50 ` [PATCH 4/7] Revert "Revert "drm/i915/chv: Use timeout mode for RC6 on chv"" ville.syrjala
2015-01-20  3:20   ` Deepak S
2015-01-19 11:50 ` [PATCH 5/7] drm/i915: Drop VLV checks from rc6p and rc6pp sysfs files ville.syrjala
2015-01-19 12:16   ` Chris Wilson
2015-01-20  3:21   ` Deepak S
2015-01-19 11:50 ` [PATCH 6/7] drm/i915: Rename 'reg' to 'clk_reg' to unconfuse it from the other 'reg' ville.syrjala
2015-01-19 12:17   ` Chris Wilson
2015-01-19 12:24   ` Chris Wilson
2015-01-20  3:22   ` Deepak S
2015-01-19 11:50 ` [PATCH 7/7] drm/i915: Add media rc6 residency file to sysfs ville.syrjala
2015-01-19 12:27   ` Chris Wilson
2015-01-19 19:16   ` shuang.he
2015-01-20  3:24   ` Deepak S
2015-01-20  8:50     ` Daniel Vetter
2015-01-20  9:30       ` Ville Syrjälä

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