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From: Peter Ujfalusi <peter.ujfalusi@ti.com>
To: "Thomas Niederprüm" <niederp@physik.uni-kl.de>, jarkko.nikula@bitmer.com
Cc: linux-omap@vger.kernel.org, alsa-devel@alsa-project.org
Subject: Re: [PATCH v2] ASoC: OMAP: mcbsp: ensure that CLKX and CLKR are not used as ouput pins when they are used as input clock for the SRG.
Date: Tue, 20 Jan 2015 10:47:55 +0200	[thread overview]
Message-ID: <54BE163B.2000208@ti.com> (raw)
In-Reply-To: <1421702668-21135-1-git-send-email-niederp@physik.uni-kl.de>

On 01/19/2015 11:24 PM, Thomas Niederprüm wrote:
> This patch fixes faulty behaviour in a setup where the input clock for the
> SRG is fed through the CLKR/CLKX pin but the McBSP is configured to be
> master (SND_SOC_DAIFMT_CBS_CFS). In that case of course CLKR/CLKX must
> not be configured as output pin. Otherwise the input clock is messed up
> horribly.
> 
> This patch makes it possible to use the CLKR/CLKX pin rather than CLKS to
> inject a reference clock in setups where McBSP is master and not both
> rx and tx are used. However for this to work it has to be ensured that
> set_dai_sysclk() is called after set_dai_fmt().
> 
> This was tested on a beagleboard-xm using McBSP1 to drive a i2s DAC through
> the tx lines (CLKX,FSX,DX). Using this patch the CLKR pin is used to inject
> an external reference clock.
> 
> changes since v1:
> - added comments explaining the bit masking to disable output on CLKR/CLKX

Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>

> 
> Signed-off-by: Thomas Niederprüm <niederp@physik.uni-kl.de>
> ---
>  sound/soc/omap/omap-mcbsp.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c
> index bd3ef2a..c37f606 100644
> --- a/sound/soc/omap/omap-mcbsp.c
> +++ b/sound/soc/omap/omap-mcbsp.c
> @@ -530,8 +530,19 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
>  
>  	case OMAP_MCBSP_SYSCLK_CLKX_EXT:
>  		regs->srgr2	|= CLKSM;
> +		regs->pcr0	|= SCLKME;
> +		/*
> +		 * If McBSP is master but yet the CLKX/CLKR pin drives the SRG,
> +		 * disable output on those pins. This enables to inject the 
> +		 * reference clock through CLKX/CLKR. For this to work 
> +		 * set_dai_sysclk() _needs_ to be called after set_dai_fmt().
> +		 */
> +		regs->pcr0	&= ~CLKXM;
> +		break;
>  	case OMAP_MCBSP_SYSCLK_CLKR_EXT:
>  		regs->pcr0	|= SCLKME;
> +		/* Disable ouput on CLKR pin in master mode */
> +		regs->pcr0	&= ~CLKRM;
>  		break;
>  	default:
>  		err = -ENODEV;
> 


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      reply	other threads:[~2015-01-20  8:47 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-19 21:24 [PATCH v2] ASoC: OMAP: mcbsp: ensure that CLKX and CLKR are not used as ouput pins when they are used as input clock for the SRG Thomas Niederprüm
2015-01-20  8:47 ` Peter Ujfalusi [this message]

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