From mboxrd@z Thu Jan 1 00:00:00 1970 From: Caesar Wang Subject: Re: [PATCH] drm/rockchip: vop: fix vop vsync/hsync polarity Date: Thu, 22 Jan 2015 11:48:17 +0800 Message-ID: <54C07301.4010003@163.com> References: <1421896502-9943-1-git-send-email-mark.yao@rock-chips.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: In-Reply-To: <1421896502-9943-1-git-send-email-mark.yao@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org To: Mark Yao , David Airlie , Daniel Vetter , Rob Clark , Philipp Zabel , Daniel Kurtz , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org List-Id: dri-devel@lists.freedesktop.org Mark, =E5=9C=A8 2015=E5=B9=B401=E6=9C=8822=E6=97=A5 11:15, Mark Yao =E5=86=99= =E9=81=93: > Vop set wrong vsync/hsync polarity, it may cause some > display problem. known problem is that caused HDMI hdcp > authenticate failed, caused pixel offset with hdmi display. > the polarity description at RK3288 TRM doc: > dsp_vsync_pol > VSYNC polarity > 1'b0 : negative > 1'b1 : positive > dsp_hsync_pol > HSYNC polarity > 1'b0 : negative > 1'b1 : positive > > Signed-off-by: Mark Yao > --- > drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gp= u/drm/rockchip/rockchip_drm_vop.c > index 9a5c571..2b145ba5 100644 > --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c > @@ -874,8 +874,8 @@ static int vop_crtc_mode_set(struct drm_crtc *crt= c, > VOP_CTRL_SET(vop, out_mode, vop->connector_out_mode); > =20 > val =3D 0x8; > - val |=3D (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) ? 1 : 0; > - val |=3D (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) ? (1 << 1) := 0; > + val |=3D (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : 1; > + val |=3D (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : (1 << = 1); Tested-by: Caesar Wang > VOP_CTRL_SET(vop, pin_pol, val); > =20 > VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len);