From: "Álvaro Fernández Rojas" <noltari@gmail.com>
To: linux-gpio@vger.kernel.org
Subject: [PATCH v2 2/2] basic-mmio-gpio: document DT bindings
Date: Sun, 25 Jan 2015 17:32:54 +0100 [thread overview]
Message-ID: <54C51AB6.2030206@gmail.com> (raw)
In-Reply-To: <54C51A85.4@gmail.com>
Add DT support while keeping legacy support.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt
index b9bd1d6..c5d39c6 100644
--- a/Documentation/devicetree/bindings/gpio/gpio.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio.txt
@@ -209,3 +209,75 @@ Example 2:
Here, three GPIO ranges are defined wrt. two pin controllers. pinctrl1 GPIO
ranges are defined using pin numbers whereas the GPIO ranges wrt. pinctrl2
are named "foo" and "bar".
+
+3) Generic driver for memory-mapped GPIO controllers
+----------------------------------------------------
+The GPIO generic library provides support for basic platform_device
+memory-mapped GPIO controllers, which can be accessed by selecting Kconfig
+symbol GPIO_GENERIC and using library functions provided by GPIO generic
+driver (see drivers/gpio/gpio-generic.c).
+The simplest form of a GPIO controller that the driver support is just a
+single "data" register, where GPIO state can be read and/or written.
+
+The driver supports:
+- 8/16/32/64 bits registers. The number of GPIOs is determined by the width of
+ the registers.
+- GPIO controllers with clear/set registers.
+- GPIO controllers with a single "data" register.
+- Big endian bits/GPIOs ordering.
+
+For setting GPIO's there are three supported configurations:
+- single input/output register resource (named "dat").
+- set/clear pair (named "set" and "clr").
+- single output register resource and single input resource ("set" and dat").
+
+For setting the GPIO direction, there are three supported configurations:
+- simple bidirection GPIO that requires no configuration.
+- an output direction register (named "dirout") where a 1 bit indicates the
+ GPIO is an output.
+- an input direction register (named "dirin") where a 1 bit indicates the GPIO
+ is an input.
+
+Required properties:
+- compatible : Should be "basic-mmio-gpio".
+- reg : Address and length of the registers needed for the device.
+- reg-names : Names of the needed registers.
+- #gpio-cells : Should be two. The first cell is the pin number and
+ the second cell is used to specify optional parameters (currently
+ unused).
+- gpio-controller : Marks the device node as a gpio controller.
+
+Optional properties:
+- num-gpios : Specify the number of configurable gpios.
+- bit-be : Use big endian bit order for pins.
+- byte-be : Use big endian byte order for registers.
+- regset-wo : set register is unreadable.
+- regdir-wo : dir register is unreadable.
+
+Examples:
+
+gpio0: gpio-controller@10000084 {
+ compatible = "brcm,brcm6368", "basic-mmio-gpio";
+ reg = <0x10000084 0x4>, <0x1000008c 0x4>;
+ reg-names = "dirout", "dat";
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ num-gpios = <32>;
+ byte-be;
+};
+
+gpio1: gpio-controller@10000180 {
+ compatible = "foo,bar", "basic-mmio-gpio";
+ reg = <0x10000180 0x4>, <0x10000184 0x4>, <0x10000188 0x4>;
+ reg-names = "dirin", "dirout", "dat";
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ num-gpios = <20>;
+ bit-be;
+ byte-be;
+ regdir-wo;
+};
--
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next prev parent reply other threads:[~2015-01-25 16:33 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-16 22:41 basic-mmio-gpio: add DT support Álvaro Fernández Rojas
2015-01-14 5:32 ` Alexandre Courbot
2015-01-14 11:20 ` Álvaro Fernández Rojas
2015-01-19 3:37 ` Alexandre Courbot
2015-01-19 10:45 ` Mark Rutland
2015-01-25 16:32 ` [PATCH v2 1/2] " Álvaro Fernández Rojas
2015-01-25 16:32 ` Álvaro Fernández Rojas [this message]
2015-02-09 5:35 ` Alexandre Courbot
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