From: "Urs Fässler" <urs.fassler@bytesatwork.ch>
To: linux-omap@vger.kernel.org
Cc: urs.fassler@bytesatwork.ch, perex@perex.cz, tiwai@suse.de
Subject: [PATCH 2/2] davinci-mcasp: add option to use AHCLKX pin as clock in
Date: Thu, 29 Jan 2015 16:40:46 +0100 [thread overview]
Message-ID: <54CA547E.30205@bytesatwork.ch> (raw)
In-Reply-To: <1422545689-9310-1-git-send-email-urs.fassler@bytesatwork.ch>
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Add option to select AHCLKX pin as clock input source.
---
sound/soc/davinci/davinci-mcasp.c | 20 +++++++++++++++++---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/sound/soc/davinci/davinci-mcasp.c
b/sound/soc/davinci/davinci-mcasp.c
index 396cdec..7c0d591 100644
--- a/sound/soc/davinci/davinci-mcasp.c
+++ b/sound/soc/davinci/davinci-mcasp.c
@@ -85,6 +85,7 @@ struct davinci_mcasp {
int sysclk_freq;
bool bclk_master;
+ bool ahclkx_pin;
/* McASP FIFO related */
u8 txnumevt;
@@ -429,7 +430,10 @@ static int davinci_mcasp_set_dai_fmt(struct
snd_soc_dai *cpu_dai,
break;
case SND_SOC_DAIFMT_CBM_CFS:
/* codec is clock master and frame slave */
- mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);
+ if (mcasp->ahclkx_pin)
+ mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);
+ else
+ mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);
mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE);
mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);
@@ -441,7 +445,10 @@ static int davinci_mcasp_set_dai_fmt(struct
snd_soc_dai *cpu_dai,
break;
case SND_SOC_DAIFMT_CBM_CFM:
/* codec is clock and frame master */
- mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);
+ if (mcasp->ahclkx_pin)
+ mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);
+ else
+ mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);
mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE);
mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);
@@ -542,7 +549,10 @@ static int davinci_mcasp_set_sysclk(struct
snd_soc_dai *dai, int clk_id,
struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai);
if (mcasp->bclk_master) {
- mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE);
+ if (mcasp->ahclkx_pin)
+ mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE);
+ else
+ mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE);
mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE);
mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AHCLKX);
} else {
@@ -1340,6 +1350,8 @@ static struct davinci_mcasp_pdata
*davinci_mcasp_set_pdata_from_of(
if (ret >= 0)
pdata->sram_size_capture = val;
+ pdata->clk_input_pin = of_property_read_bool(np, "ahclkx-pin");
+
return pdata;
nodata:
@@ -1412,6 +1424,8 @@ static int davinci_mcasp_probe(struct
platform_device *pdev)
goto err;
}
+ mcasp->ahclkx_pin = pdata->clk_input_pin;
+
mcasp->op_mode = pdata->op_mode;
/* sanity check for tdm slots parameter */
if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE) {
--
2.1.4
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next parent reply other threads:[~2015-01-29 15:48 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1422545689-9310-1-git-send-email-urs.fassler@bytesatwork.ch>
2015-01-29 15:40 ` Urs Fässler [this message]
[not found] <1423212723-15307-1-git-send-email-urs.fassler@bytesatwork.ch>
2015-02-06 9:22 ` [PATCH 2/2] davinci-mcasp: add option to use AHCLKX pin as clock in Urs Fässler
2015-02-06 9:22 ` Urs Fässler
2015-02-06 11:49 ` Peter Ujfalusi
2015-02-06 11:49 ` Peter Ujfalusi
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