From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Boris Ostrovsky <boris.ostrovsky@oracle.com>, JBeulich@suse.com
Cc: xen-devel@lists.xenproject.org, kevin.tian@intel.com,
dietmar.hahn@ts.fujitsu.com
Subject: Re: [PATCH v3 2/3] x86/VPMU: Disable VPMU when NMI watchdog is on
Date: Fri, 30 Jan 2015 17:37:05 +0000 [thread overview]
Message-ID: <54CBC141.8060609@citrix.com> (raw)
In-Reply-To: <1422638157-1919-3-git-send-email-boris.ostrovsky@oracle.com>
On 30/01/15 17:15, Boris Ostrovsky wrote:
> NMI watchdog sets APIC_LVTPC register to generate an NMI when PMU counter
> overflow occurs. This may be overwritten by VPMU code later, effectively
> turning off the watchdog.
>
> We should disable VPMU when NMI watchdog is running.
>
> Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
> ---
> docs/misc/xen-command-line.markdown | 2 ++
> xen/arch/x86/hvm/vpmu.c | 13 +++++++++++++
> 2 files changed, 15 insertions(+)
>
> diff --git a/docs/misc/xen-command-line.markdown b/docs/misc/xen-command-line.markdown
> index 2274e74..bc316be 100644
> --- a/docs/misc/xen-command-line.markdown
> +++ b/docs/misc/xen-command-line.markdown
> @@ -1346,6 +1346,8 @@ wrong behaviour (see handle\_pmc\_quirk()).
> If 'vpmu=bts' is specified the virtualisation of the Branch Trace Store (BTS)
> feature is switched on on Intel processors supporting this feature.
>
> +Note that if **watchdog** option is also specified vpmu will be turned off.
> +
> *Warning:*
> As the BTS virtualisation is not 100% safe and because of the nehalem quirk
> don't use the vpmu flag on production systems with Intel cpus!
> diff --git a/xen/arch/x86/hvm/vpmu.c b/xen/arch/x86/hvm/vpmu.c
> index 63b2158..b2e8e65 100644
> --- a/xen/arch/x86/hvm/vpmu.c
> +++ b/xen/arch/x86/hvm/vpmu.c
> @@ -24,6 +24,7 @@
> #include <asm/regs.h>
> #include <asm/types.h>
> #include <asm/msr.h>
> +#include <asm/nmi.h>
> #include <asm/hvm/support.h>
> #include <asm/hvm/vmx/vmx.h>
> #include <asm/hvm/vmx/vmcs.h>
> @@ -288,3 +289,15 @@ void vpmu_dump(struct vcpu *v)
> vpmu->arch_vpmu_ops->arch_vpmu_dump(v);
> }
>
> +static int __init vpmu_init(void)
> +{
> + /* NMI watchdog uses LVTPC and HW counter */
> + if ( opt_watchdog && opt_vpmu_enabled )
> + {
> + printk(XENLOG_WARNING "NMI watchdog is enabled. Turning VPMU off.\n");
> + opt_vpmu_enabled = 0;
> + }
> +
> + return 0;
> +}
> +__initcall(vpmu_init);
next prev parent reply other threads:[~2015-01-30 17:37 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-30 17:15 [PATCH v3 0/3] A few VPMU/watchdog-related patches Boris Ostrovsky
2015-01-30 17:15 ` [PATCH v3 1/3] x86/nmi: Cleanup usage of nmi_watchdog Boris Ostrovsky
2015-01-30 17:33 ` Andrew Cooper
2015-01-30 17:15 ` [PATCH v3 2/3] x86/VPMU: Disable VPMU when NMI watchdog is on Boris Ostrovsky
2015-01-30 17:37 ` Andrew Cooper [this message]
2015-01-30 17:15 ` [PATCH v3 3/3] x86/VPMU: Handle APIC_LVTPC accesses Boris Ostrovsky
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=54CBC141.8060609@citrix.com \
--to=andrew.cooper3@citrix.com \
--cc=JBeulich@suse.com \
--cc=boris.ostrovsky@oracle.com \
--cc=dietmar.hahn@ts.fujitsu.com \
--cc=kevin.tian@intel.com \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.