From: Nikolay Dimitrov <picmaster@mail.bg>
To: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Takashi Iwai <tiwai@suse.de>,
Fabio Estevam <fabio.estevam@freescale.com>,
"alsa-devel@alsa-project.org" <alsa-devel@alsa-project.org>,
Mark Brown <broonie@kernel.org>,
Fabio Estevam <festevam@gmail.com>
Subject: Re: [PATCH V2] ASoC: sgtl5000: add delay before first I2C access
Date: Fri, 30 Jan 2015 23:50:20 +0200 [thread overview]
Message-ID: <54CBFC9C.5060906@mail.bg> (raw)
In-Reply-To: <CAOMZO5BwM1CEAtFnqxS9xwSy2OamHCuEw=YBT8vf5FNa_4GA7A@mail.gmail.com>
Hi Eric,
On 01/30/2015 11:31 PM, Fabio Estevam wrote:
> Hi Eric,
>
> On Fri, Jan 30, 2015 at 7:07 PM, Eric Nelson
> <eric.nelson@boundarydevices.com> wrote:
>> To quote from section 1.3.1 of the data sheet:
>> The SGTL5000 has an internal reset that is deasserted
>> 8 SYS_MCLK cycles after all power rails have been brought
>> up. After this time, communication can start
>>
>> ...
>> 1.0uS represents 8 SYS_MCLK cycles at the minimum 8.0 MHz SYS_MCLK.
>
> Small detail: Should be us instead of uS.
FYI - If you're observing issues with communicating with SGTL5000 I2C,
please make sure also that the chip has a valid clock signal on
SYS_MCLK, otherwise it won't respond on I2C transactions (I2C will work
with any SYS_MCLK in the range 8-27MHz).
Kind regards,
Nikolay
next prev parent reply other threads:[~2015-01-30 21:50 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-30 20:52 [PATCH] ASoC: sgtl5000: add delay before first I2C access Eric Nelson
2015-01-30 21:07 ` [PATCH V2] " Eric Nelson
2015-01-30 21:31 ` Fabio Estevam
2015-01-30 21:50 ` Nikolay Dimitrov [this message]
2015-01-30 22:02 ` Eric Nelson
2015-01-30 22:24 ` Nikolay Dimitrov
2015-01-30 22:34 ` Eric Nelson
2015-02-03 13:09 ` Mark Brown
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