Re: [v3,1/9] clk: samsung: exynos5433: Add clocks for CMU_APOLLO domain

[Sylwester Nawrocki <s.nawrocki@samsung.com>]

On 05/02/15 08:44, Pankaj Dubey wrote:
>> +static struct samsung_gate_clock apollo_gate_clks[] __initdata = {

>> > +
>> > +	/* ENABLE_PCLK_APOLLO */
>> > +	GATE(CLK_PCLK_ASAPBMST_CSSYS_APOLLO, "pclk_asapbmst_cssys_apollo",
>> > +			"div_pclk_dbg_apollo", ENABLE_PCLK_APOLLO,
>> > +			2, CLK_IGNORE_UNUSED, 0),
>> > +	GATE(CLK_PCLK_PMU_APOLLO, "pclk_pmu_apollo", "div_pclk_apollo",
>> > +			ENABLE_PCLK_APOLLO, 1, CLK_IGNORE_UNUSED, 0),
>> > +	GATE(CLK_PCLK_SYSREG_APOLLO, "pclk_pmu_sysreg_apollo",
>
> Isn't "pclk_pmu_sysreg_apollo" be named as "pclk_sysreg_apollo" to match 
> with UM?

Sounds reasonable, Chanwoo, if you agree I'll squash following change
to this patch before sending upstream:

diff --git a/drivers/clk/samsung/clk-exynos5433.c
b/drivers/clk/samsung/clk-exynos5433.c
index 7a024cd..387e3e3 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -3656,7 +3656,7 @@ static struct samsung_gate_clock apollo_gate_clks[]
__initdata = {
                        2, CLK_IGNORE_UNUSED, 0),
        GATE(CLK_PCLK_PMU_APOLLO, "pclk_pmu_apollo", "div_pclk_apollo",
                        ENABLE_PCLK_APOLLO, 1, CLK_IGNORE_UNUSED, 0),
-       GATE(CLK_PCLK_SYSREG_APOLLO, "pclk_pmu_sysreg_apollo",
+       GATE(CLK_PCLK_SYSREG_APOLLO, "pclk_sysreg_apollo",
                        "div_pclk_apollo", ENABLE_PCLK_APOLLO,
                        0, CLK_IGNORE_UNUSED, 0),
--
Thanks,
Sylwester