From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexandre Courbot Subject: Re: [PATCH -next] drm/nouveau/clk: Use plain "/" for 32-bit division Date: Fri, 6 Feb 2015 15:50:17 +0900 Message-ID: <54D46429.4020208@nvidia.com> References: <1423065755-19337-1-git-send-email-geert@linux-m68k.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1423065755-19337-1-git-send-email-geert@linux-m68k.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Geert Uytterhoeven , David Airlie Cc: linux-next@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org List-Id: linux-next.vger.kernel.org SGkgR2VlcnQsCgpPbiAwMi8wNS8yMDE1IDAxOjAyIEFNLCBHZWVydCBVeXR0ZXJob2V2ZW4gd3Jv dGU6Cj4gT24gMzItYml0IHBsYXRmb3JtcyB1c2luZyBhc20tZ2VuZXJpYy9kaXY2NC5oOgo+Cj4g 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IHRha2UsIGNvdWxkIHdlIHJhdGhlciBmaXggdGhpcyBieSBtYWtpbmcgcmF0ZSBhIHU2ND8gV2l0 aCAKdGhlIGN1cnJlbnQgbWF4aW11bSB2YWx1ZXMgb2YgcHJpdi0+cGFyZW50X3JhdGUgYW5kIHBy aXYtPm4sIHJhdGUgbWlnaHQgCmFwcHJvYWNoIGRhbmdlcm91c2x5IHRvIHRoZSB1MzIgbGltaXQg YW5kIEkgYmVsaWV2ZSBjYXN0aW5nIGl0IHRvIHU2NCAKd291bGQgYmUgc2FmZXIuCl9fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5n IGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwOi8vbGlzdHMuZnJlZWRl c2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754924AbbBFGu0 (ORCPT ); Fri, 6 Feb 2015 01:50:26 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:2574 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753658AbbBFGuX (ORCPT ); Fri, 6 Feb 2015 01:50:23 -0500 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Thu, 05 Feb 2015 22:49:42 -0800 Message-ID: <54D46429.4020208@nvidia.com> Date: Fri, 6 Feb 2015 15:50:17 +0900 From: Alexandre Courbot Organization: NVIDIA User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.4.0 MIME-Version: 1.0 To: Geert Uytterhoeven , David Airlie CC: , , Subject: Re: [PATCH -next] drm/nouveau/clk: Use plain "/" for 32-bit division References: <1423065755-19337-1-git-send-email-geert@linux-m68k.org> In-Reply-To: <1423065755-19337-1-git-send-email-geert@linux-m68k.org> X-NVConfidentiality: public X-Originating-IP: [10.19.57.128] X-ClientProxiedBy: HKMAIL103.nvidia.com (10.18.16.12) To HKMAIL103.nvidia.com (10.18.16.12) Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Geert, On 02/05/2015 01:02 AM, Geert Uytterhoeven wrote: > On 32-bit platforms using asm-generic/div64.h: > > drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c: In function 'gk20a_pllg_calc_rate': > drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c:147:79: warning: comparison of distinct pointer types lacks a cast > do_div(rate, divider); > ^ > drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c:147:2: warning: right shift count >= width of type > do_div(rate, divider); > ^ > drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c:147:238: warning: passing argument 1 of '__div64_32' from incompatible pointer type > do_div(rate, divider); > ^ > In file included from arch/parisc/include/generated/asm/div64.h:1:0, > from include/linux/kernel.h:124, > from include/linux/list.h:8, > from include/linux/preempt.h:10, > from include/linux/spinlock.h:50, > from include/linux/mmzone.h:7, > from include/linux/gfp.h:5, > from include/linux/slab.h:14, > from drivers/gpu/drm/nouveau/include/nvif/os.h:5, > from drivers/gpu/drm/nouveau/include/nvkm/core/os.h:3, > from drivers/gpu/drm/nouveau/include/nvkm/core/object.h:3, > from drivers/gpu/drm/nouveau/include/nvkm/core/subdev.h:3, > from drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h:3, > from drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c:25: > include/asm-generic/div64.h:35:17: note: expected 'uint64_t *' but argument is of type 'u32 *' > extern uint32_t __div64_32(uint64_t *dividend, uint32_t divisor); > ^ > > do_div() is meant for 64-bit by 32-bit division, but both the dividend > and divisor are 32-bit here. Hence use plain "/" instead. > > Signed-off-by: Geert Uytterhoeven > --- > Compile-tested only. > > parisc/allmodconfig: > http://kisskb.ellerman.id.au/kisskb/buildresult/12358386/ > --- > drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c > index 65c532742b08d1c6..022595876ea4dc85 100644 > --- a/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c > +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c > @@ -144,9 +144,8 @@ gk20a_pllg_calc_rate(struct gk20a_clk_priv *priv) > > rate = priv->parent_rate * priv->n; > divider = priv->m * pl_to_div[priv->pl]; > - do_div(rate, divider); > > - return rate / 2; > + return rate / divider / 2; I agree there is a problem here, but considering the theoretical values that rate can take, could we rather fix this by making rate a u64? With the current maximum values of priv->parent_rate and priv->n, rate might approach dangerously to the u32 limit and I believe casting it to u64 would be safer.