From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter Ujfalusi Subject: Re: davinci-mcasp: extension to use AHCLKX pin as external clock source Date: Thu, 12 Feb 2015 10:09:49 +0200 Message-ID: <54DC5FCD.1070501@ti.com> References: <54D487BE.2060209@bytesatwork.ch> <54D4AA7D.6050108@ti.com> <54DA12FA.4090402@bytesatwork.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [192.94.94.40]) by alsa0.perex.cz (Postfix) with ESMTP id 173D82605C8 for ; Thu, 12 Feb 2015 09:09:57 +0100 (CET) In-Reply-To: <54DA12FA.4090402@bytesatwork.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org To: =?UTF-8?B?VXJzIEbDpHNzbGVy?= , perex@perex.cz, tiwai@suse.de Cc: alsa-devel@alsa-project.org, lgirdwood@gmail.com, jsarha@ti.com, linux-kernel@vger.kernel.org, broonie@kernel.org, misael.lopez@ti.com List-Id: alsa-devel@alsa-project.org T24gMDIvMTAvMjAxNSAwNDoxNyBQTSwgVXJzIEbDpHNzbGVyIHdyb3RlOgo+IE9uIDA2LjAyLjIw MTUgMTI6NTAsIFBldGVyIFVqZmFsdXNpIHdyb3RlOgo+PiBPbiAwMi8wNi8yMDE1IDExOjIyIEFN LCBVcnMgRsOkc3NsZXIgd3JvdGU6Cj4+PiBUaGUgQUhDTEtYIHBpbiBzZWVtcyBub3QgdG8gYmUg c3VwcG9ydGVkIGFzIGV4dGVybmFsIHNvdXJjZS4gVGhlIGZpcnN0Cj4+PiBwYXRjaCBpcyBhIGdl bmVyYWwgZml4IHRvIGFsbG93IGV4dGVybmFsIGNsb2NrLiBUaGUgc2Vjb25kIGFsbG93cyB5b3Ug dG8KPj4+IHNlbGVjdCB0aGUgQUhDTEtYIHBpbiBhcyBjbG9jayBzb3VyY2UuCj4+Pgo+Pj4gUGF0 Y2ggYnVpbHQgYWdhaW5zdCB2My4xOS1yYzcKPj4+Cj4+Cj4+IEkgZG9uJ3QgdGhpbmsgdGhpcyBz ZXJpZXMgaXMgY29ycmVjdC4gWW91IGNhbiBqdXN0IGlzc3VlOgo+PiBzbmRfc29jX2RhaV9zZXRf c3lzY2xrKGNwdV9kYWksIDAsIHN5c2NsaywgU05EX1NPQ19DTE9DS19JTik7Cj4+Cj4+IGZyb20g dGhlIG1hY2hpbmUgZHJpdmVyIHRvIHNlbGVjdCBBSENMS1ggYXMgaW5wdXQuCj4+Cj4gSSBjaGVj a2VkIGV2ZXJ5dGhpbmcgYW5kIHRoZSBzb3VyY2Ugb2YgdGhlIHByb2JsZW0gaXMsIHRoYXQgb24g b3VyCj4gaGFyZHdhcmUgdGhlIGJpdCBjbG9jayBvZiB0aGUgY29kZWMgaXMgY29ubmVjdGVkIHRv IEFIQ0xLWC4KCldoeSB3b3VsZCBhbnkgSFcgZGVzaWduZXIgZG8gdGhpcz8/PwoKSnVzdCB0byBj bGFyaWZ5IHRoaXM6IHRoZSBiaXRjbG9jayBmcm9tIGNvZGVjIGlzIG9ubHkgY29ubmVjdGVkIHRv IEFIQ0xLWCBwaW4sCm9yIGlzIGl0IGFsc28gY29ubmVjdGVkIHRvIHRoZSBBQ0xLWCBwaW4/ClRo ZSB1c2Ugb2YgQUhDTEtYL1IgcGluIGlzIF9vcHRpb25hbF8gaW4gTWNBU1AgYW5kIGl0IHNlcnZl cyB0aGUgcHVycG9zZSBvZgpwcm92aWRpbmcgYSB3YXkgdG8gaGF2ZSBzeW5jaHJvbml6ZWQgbWFz dGVyIGNsb2NrIGZvciB0aGUgY29kZWMgYW5kIE1jQVNQLgpBQ0xLWCwgQUZTWCBhbmQgZGF0YSBw aW5zIGFyZSBtYW5kYXRvcnkgdG8gYmUgY29ubmVjdGVkLgoKPiBBY2NvcmRpbmcgdG8gdGhlIGRh dGFzaGVldCwgQUhDTEtYIGlzIGZvciB0aGUgbWFzdGVyIGNsb2NrIG9ubHkuCgpZZXMsIGl0IGlz IGZvciB0aGUgbWFzdGVyIGNsb2NrIHRvIGJlIHVzZWQgYnkgYm90aCBjb2RlYyBhbmQgTWNBU1Ag dG8gYXZvaWQKY2xvY2sgZHJpZnRpbmcuCgo+IE9uIHRoZSBvdGhlciBoYW5kLCBpdCBpcyBwb3Nz aWJsZSB0byByb3V0ZSBhIGJpdGNsb2NrIGZyb20gQUhDTEtYIHRvCiA+dGhlIHN1YnN5c3RlbSAo d2hhdCBJIGRpZCB3aXRoIG15IHBhdGNoZXMpLgoKWWVzLCBpdCBpcyBwb3NzaWJsZSwgd2hlbiBN Y0FTUCBpcyBtYXN0ZXIgaXQgY2FuIHVzZSB0aGUgc2lnbmFsIG9uIEFIQ0xLWCBwaW4KdG8gZ2Vu ZXJhdGUgdGhlIEJDTEsvRlMuCgo+IE5vdyBteSBxdWVzdGlvbiBpcywgaWYgaXQgaXMgZXZlbiB3 b3J0aCB0cnlpbmcgdG8gYnJpbmcgc3VjaCBhbiBvcHRpb24KPiBmb3IgdGhlIGRyaXZlciAodXNl IEFIQ0xLWCBhcyBiaXQgY2xvY2sgaW4pIHVwc3RyZWFtPwoKSSBkb24ndCB3YW50IEhXIGRlc2ln bmVycyB0byBnZXQgaWRlYXMgZnJvbSBjb2RlIC0gYnV0IGlmIHRoZXkgZGlkIHdoYXQgSQp0aGlu ayB0aGV5IGRpZCB3aXRoIHlvdXIgSFcgdGhleSBjZXJ0YWlubHkgbm90IGdvaW5nIHRvIGJvdGhl ciBjaGVja2luZyBUUk0gb3IKY29kZS4uLgoKQnV0IEkgdGhpbmsgeW91IGNhbiBzdGlsbCBnZXQg dGhlIHNldHVwIHdvcmtpbmcsIGlmIGl0IGlzIHJlYWxseSBsaWtlIHRoaXM6CgpNY0FTUApBSENM S1ggPC0tIGJpdGNsb2NrIDwtLSBjb2RlYwpBQ0xLWCAgKG5vdCBjb25uZWN0ZWQgd2hpbGUgaXQg c2hvdWxkIGhhdmUgYmVlbikKRlNYICAgIDwtLSBmcmFtc3luYyA8LS0gY29kZWMKCkluIHRoaXMg Y2FzZSB5b3Ugd2FudCB0byBjb25maWd1cmUgdGhlIGNvZGVjIHRvIGJlIENCTV9DRk0gYW5kIE1j QVNQIGFzCkNCU19DRk0gKHdlIGRvbid0IGhhdmUgdGhpcyBzdXBwb3J0ZWQgaW4gdGhlIGRyaXZl ciwgYnV0IG5vdCBhIGJpZyBkZWFsIHRvIGFkZCkuCgpBbmQgeW91IGNhbGw6CnNuZF9zb2NfZGFp X3NldF9zeXNjbGsoY3B1X2RhaSwgMCwgc3lzY2xrLCBTTkRfU09DX0NMT0NLX0lOKTsKc25kX3Nv Y19kYWlfc2V0X2Nsa2RpdihjcHVfZGFpLCAxLCAxKTsKCllvdSB3aWxsIGhhdmUgdGhlIGNvZGVj IHByb3ZpZGluZyB0aGUgRlMgYW5kIGRyaXZpbmcgdGhlIGJpdGNsb2NrIChjb25uZWN0ZWQKdG8g d3JvbmcgTWNBU1AgcGluKS4gTWNBU1Agd2lsbCBkcml2ZSB0aGUgYml0Y2xvY2sgdXNpbmcgdGhl IEFIQ0xLWCBhcyBzb3VyY2UKdXNpbmcgZGl2aWRlIGJ5IDEuIE1jQVNQIHdpbGwgbm90IHRyeSB0 byBkcml2ZSBGUy4KCi0tIApQw6l0ZXIKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX18KQWxzYS1kZXZlbCBtYWlsaW5nIGxpc3QKQWxzYS1kZXZlbEBhbHNhLXBy b2plY3Qub3JnCmh0dHA6Ly9tYWlsbWFuLmFsc2EtcHJvamVjdC5vcmcvbWFpbG1hbi9saXN0aW5m by9hbHNhLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755277AbbBLIKR (ORCPT ); Thu, 12 Feb 2015 03:10:17 -0500 Received: from arroyo.ext.ti.com ([192.94.94.40]:59622 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751622AbbBLIKQ (ORCPT ); Thu, 12 Feb 2015 03:10:16 -0500 Message-ID: <54DC5FCD.1070501@ti.com> Date: Thu, 12 Feb 2015 10:09:49 +0200 From: Peter Ujfalusi User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.4.0 MIME-Version: 1.0 To: =?UTF-8?B?VXJzIEbDpHNzbGVy?= , , CC: , , , , , Subject: Re: davinci-mcasp: extension to use AHCLKX pin as external clock source References: <54D487BE.2060209@bytesatwork.ch> <54D4AA7D.6050108@ti.com> <54DA12FA.4090402@bytesatwork.ch> In-Reply-To: <54DA12FA.4090402@bytesatwork.ch> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 02/10/2015 04:17 PM, Urs Fässler wrote: > On 06.02.2015 12:50, Peter Ujfalusi wrote: >> On 02/06/2015 11:22 AM, Urs Fässler wrote: >>> The AHCLKX pin seems not to be supported as external source. The first >>> patch is a general fix to allow external clock. The second allows you to >>> select the AHCLKX pin as clock source. >>> >>> Patch built against v3.19-rc7 >>> >> >> I don't think this series is correct. You can just issue: >> snd_soc_dai_set_sysclk(cpu_dai, 0, sysclk, SND_SOC_CLOCK_IN); >> >> from the machine driver to select AHCLKX as input. >> > I checked everything and the source of the problem is, that on our > hardware the bit clock of the codec is connected to AHCLKX. Why would any HW designer do this??? Just to clarify this: the bitclock from codec is only connected to AHCLKX pin, or is it also connected to the ACLKX pin? The use of AHCLKX/R pin is _optional_ in McASP and it serves the purpose of providing a way to have synchronized master clock for the codec and McASP. ACLKX, AFSX and data pins are mandatory to be connected. > According to the datasheet, AHCLKX is for the master clock only. Yes, it is for the master clock to be used by both codec and McASP to avoid clock drifting. > On the other hand, it is possible to route a bitclock from AHCLKX to >the subsystem (what I did with my patches). Yes, it is possible, when McASP is master it can use the signal on AHCLKX pin to generate the BCLK/FS. > Now my question is, if it is even worth trying to bring such an option > for the driver (use AHCLKX as bit clock in) upstream? I don't want HW designers to get ideas from code - but if they did what I think they did with your HW they certainly not going to bother checking TRM or code... But I think you can still get the setup working, if it is really like this: McASP AHCLKX <-- bitclock <-- codec ACLKX (not connected while it should have been) FSX <-- framsync <-- codec In this case you want to configure the codec to be CBM_CFM and McASP as CBS_CFM (we don't have this supported in the driver, but not a big deal to add). And you call: snd_soc_dai_set_sysclk(cpu_dai, 0, sysclk, SND_SOC_CLOCK_IN); snd_soc_dai_set_clkdiv(cpu_dai, 1, 1); You will have the codec providing the FS and driving the bitclock (connected to wrong McASP pin). McASP will drive the bitclock using the AHCLKX as source using divide by 1. McASP will not try to drive FS. -- Péter