diff for duplicates of <54DDD447.8000404@kapsi.fi> diff --git a/a/1.txt b/N1/1.txt index f1c1451..f5792c5 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,6 +1,6 @@ On 02/12/2015 04:19 PM, Peter De Schrijver wrote: > On Thu, Jan 08, 2015 at 03:22:08PM +0200, Mikko Perttunen wrote: ->> From: Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +>> From: Paul Walmsley <pwalmsley@nvidia.com> >> >> The DVCO present in the DFLL IP block has a separate reset line, >> exposed via the CAR IP block. This reset line is asserted upon SoC @@ -8,7 +8,7 @@ On 02/12/2015 04:19 PM, Peter De Schrijver wrote: >> line, the DVCO will not oscillate, although reads and writes to the >> DFLL IP block will complete. >> ->> Thanks to Aleksandr Frid <afrid-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> for identifying this and +>> Thanks to Aleksandr Frid <afrid@nvidia.com> for identifying this and >> saving hours of debugging time. >> > @@ -19,10 +19,10 @@ doesn't fit well with the existing numbering scheme there, though. Perhaps a magic high-valued constant that represents it. > ->> Signed-off-by: Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +>> Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com> >> [ttynkkynen: ported to tegra124 from tegra114] ->> Signed-off-by: Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> ->> Signed-off-by: Mikko Perttunen <mikko.perttunen-/1wQRMveznE@public.gmane.org> +>> Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com> +>> Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi> >> --- >> drivers/clk/tegra/clk-tegra124.c | 47 ++++++++++++++++++++++++++++++++++++++++ >> drivers/clk/tegra/clk.h | 3 +++ diff --git a/a/content_digest b/N1/content_digest index 689b617..80e670d 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,31 +1,15 @@ "ref\01420723339-30735-1-git-send-email-mikko.perttunen@kapsi.fi\0" "ref\01420723339-30735-6-git-send-email-mikko.perttunen@kapsi.fi\0" "ref\020150212141944.GK20811@tbergstrom-lnx.Nvidia.com\0" - "ref\020150212141944.GK20811-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org\0" - "From\0Mikko Perttunen <mikko.perttunen-/1wQRMveznE@public.gmane.org>\0" - "Subject\0Re: [PATCH v7 05/16] clk: tegra: Add DFLL DVCO reset control for Tegra124\0" + "From\0mikko.perttunen@kapsi.fi (Mikko Perttunen)\0" + "Subject\0[PATCH v7 05/16] clk: tegra: Add DFLL DVCO reset control for Tegra124\0" "Date\0Fri, 13 Feb 2015 12:39:03 +0200\0" - "To\0Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" - "Cc\0swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org" - thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org - gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org - rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org - viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org - mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org - pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org - vinceh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org - pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - tuomas.tynkkynen-X3B1VOXEql0@public.gmane.org - " Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 02/12/2015 04:19 PM, Peter De Schrijver wrote:\n" "> On Thu, Jan 08, 2015 at 03:22:08PM +0200, Mikko Perttunen wrote:\n" - ">> From: Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + ">> From: Paul Walmsley <pwalmsley@nvidia.com>\n" ">>\n" ">> The DVCO present in the DFLL IP block has a separate reset line,\n" ">> exposed via the CAR IP block. This reset line is asserted upon SoC\n" @@ -33,7 +17,7 @@ ">> line, the DVCO will not oscillate, although reads and writes to the\n" ">> DFLL IP block will complete.\n" ">>\n" - ">> Thanks to Aleksandr Frid <afrid-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> for identifying this and\n" + ">> Thanks to Aleksandr Frid <afrid@nvidia.com> for identifying this and\n" ">> saving hours of debugging time.\n" ">>\n" ">\n" @@ -44,10 +28,10 @@ "Perhaps a magic high-valued constant that represents it.\n" "\n" ">\n" - ">> Signed-off-by: Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + ">> Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com>\n" ">> [ttynkkynen: ported to tegra124 from tegra114]\n" - ">> Signed-off-by: Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" - ">> Signed-off-by: Mikko Perttunen <mikko.perttunen-/1wQRMveznE@public.gmane.org>\n" + ">> Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>\n" + ">> Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>\n" ">> ---\n" ">> drivers/clk/tegra/clk-tegra124.c | 47 ++++++++++++++++++++++++++++++++++++++++\n" ">> drivers/clk/tegra/clk.h | 3 +++\n" @@ -136,4 +120,4 @@ ">> 2.2.1\n" >> -1ace980a9f834e981defec80afb540937acfb545a8ba8aac0df82199ffd25271 +98f2ddd0a780262b461de2055b88b3c3972ecc9043827f12419ae8832fca3183
diff --git a/a/1.txt b/N2/1.txt index f1c1451..f5792c5 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,6 +1,6 @@ On 02/12/2015 04:19 PM, Peter De Schrijver wrote: > On Thu, Jan 08, 2015 at 03:22:08PM +0200, Mikko Perttunen wrote: ->> From: Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +>> From: Paul Walmsley <pwalmsley@nvidia.com> >> >> The DVCO present in the DFLL IP block has a separate reset line, >> exposed via the CAR IP block. This reset line is asserted upon SoC @@ -8,7 +8,7 @@ On 02/12/2015 04:19 PM, Peter De Schrijver wrote: >> line, the DVCO will not oscillate, although reads and writes to the >> DFLL IP block will complete. >> ->> Thanks to Aleksandr Frid <afrid-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> for identifying this and +>> Thanks to Aleksandr Frid <afrid@nvidia.com> for identifying this and >> saving hours of debugging time. >> > @@ -19,10 +19,10 @@ doesn't fit well with the existing numbering scheme there, though. Perhaps a magic high-valued constant that represents it. > ->> Signed-off-by: Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +>> Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com> >> [ttynkkynen: ported to tegra124 from tegra114] ->> Signed-off-by: Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> ->> Signed-off-by: Mikko Perttunen <mikko.perttunen-/1wQRMveznE@public.gmane.org> +>> Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com> +>> Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi> >> --- >> drivers/clk/tegra/clk-tegra124.c | 47 ++++++++++++++++++++++++++++++++++++++++ >> drivers/clk/tegra/clk.h | 3 +++ diff --git a/a/content_digest b/N2/content_digest index 689b617..9cb5f85 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,31 +1,30 @@ "ref\01420723339-30735-1-git-send-email-mikko.perttunen@kapsi.fi\0" "ref\01420723339-30735-6-git-send-email-mikko.perttunen@kapsi.fi\0" "ref\020150212141944.GK20811@tbergstrom-lnx.Nvidia.com\0" - "ref\020150212141944.GK20811-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org\0" - "From\0Mikko Perttunen <mikko.perttunen-/1wQRMveznE@public.gmane.org>\0" + "From\0Mikko Perttunen <mikko.perttunen@kapsi.fi>\0" "Subject\0Re: [PATCH v7 05/16] clk: tegra: Add DFLL DVCO reset control for Tegra124\0" "Date\0Fri, 13 Feb 2015 12:39:03 +0200\0" - "To\0Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" - "Cc\0swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org" - thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org - gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org - rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org - viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org - mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org - pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org - vinceh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org - pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - tuomas.tynkkynen-X3B1VOXEql0@public.gmane.org - " Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" + "To\0Peter De Schrijver <pdeschrijver@nvidia.com>\0" + "Cc\0swarren@wwwdotorg.org" + thierry.reding@gmail.com + gnurou@gmail.com + rjw@rjwysocki.net + viresh.kumar@linaro.org + mturquette@linaro.org + pwalmsley@nvidia.com + vinceh@nvidia.com + pgaikwad@nvidia.com + linux-kernel@vger.kernel.org + linux-pm@vger.kernel.org + linux-tegra@vger.kernel.org + linux-arm-kernel@lists.infradead.org + tuomas.tynkkynen@iki.fi + " Tuomas Tynkkynen <ttynkkynen@nvidia.com>\0" "\00:1\0" "b\0" "On 02/12/2015 04:19 PM, Peter De Schrijver wrote:\n" "> On Thu, Jan 08, 2015 at 03:22:08PM +0200, Mikko Perttunen wrote:\n" - ">> From: Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + ">> From: Paul Walmsley <pwalmsley@nvidia.com>\n" ">>\n" ">> The DVCO present in the DFLL IP block has a separate reset line,\n" ">> exposed via the CAR IP block. This reset line is asserted upon SoC\n" @@ -33,7 +32,7 @@ ">> line, the DVCO will not oscillate, although reads and writes to the\n" ">> DFLL IP block will complete.\n" ">>\n" - ">> Thanks to Aleksandr Frid <afrid-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> for identifying this and\n" + ">> Thanks to Aleksandr Frid <afrid@nvidia.com> for identifying this and\n" ">> saving hours of debugging time.\n" ">>\n" ">\n" @@ -44,10 +43,10 @@ "Perhaps a magic high-valued constant that represents it.\n" "\n" ">\n" - ">> Signed-off-by: Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + ">> Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com>\n" ">> [ttynkkynen: ported to tegra124 from tegra114]\n" - ">> Signed-off-by: Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" - ">> Signed-off-by: Mikko Perttunen <mikko.perttunen-/1wQRMveznE@public.gmane.org>\n" + ">> Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>\n" + ">> Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>\n" ">> ---\n" ">> drivers/clk/tegra/clk-tegra124.c | 47 ++++++++++++++++++++++++++++++++++++++++\n" ">> drivers/clk/tegra/clk.h | 3 +++\n" @@ -136,4 +135,4 @@ ">> 2.2.1\n" >> -1ace980a9f834e981defec80afb540937acfb545a8ba8aac0df82199ffd25271 +4150190299316cad1432f580184d7f234c1067bb9051e125cdd1cd84e6904cf9
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.