From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH 1/2] xen: arm: log warning for interrupt configuration mismatch Date: Thu, 19 Feb 2015 15:45:08 +0000 Message-ID: <54E60504.6030604@linaro.org> References: <1424359395.30924.89.camel@citrix.com> <1424359443-21584-1-git-send-email-ian.campbell@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1424359443-21584-1-git-send-email-ian.campbell@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian Campbell , xen-devel@lists.xen.org Cc: tim@xen.org, Pranavkumar Sawargaonkar , stefano.stabellini@eu.citrix.com List-Id: xen-devel@lists.xenproject.org Hi Ian, On 19/02/15 15:24, Ian Campbell wrote: > The ICFGR register is not necessarily writeable, in particular it is > IMPLEMENTATION DEFINED for a PPI if the configuration register is > writeable. Log a warning if the hardware has ignored our write and > update the actual type in the irq descriptor so subsequent code can do > the right thing. > > This most likely implies a buggy firmware description (e.g. > device-tree). > > The issue is observed for example on the APM Mustang board where the > device tree (as shipped by Linux) describes all 3 timer interrupts as > rising edge but the PPI is hard-coded to level triggered (as makes > sense for an arch timer interrupt). > > Signed-off-by: Ian Campbell > Cc: Pranavkumar Sawargaonkar Reviewed-by: Julien Grall Regards, -- Julien Grall